Rose Thompson
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e5d3462a90
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Converted wall.tcl to entirely project mode.
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2024-08-27 14:15:58 -07:00 |
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Rose Thompson
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f20a1564fa
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Added SPI debugger.
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2024-08-26 17:22:13 -07:00 |
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Jacob Pease
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d649473ec8
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Merge branch 'main' of github.com:openhwgroup/cvw
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2024-08-24 21:57:44 -05:00 |
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Jacob Pease
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ad6734eb6d
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Improved the speed of the bootloader by 60s. CRC16 is now calculated with a table and a byte is now sent for every byte read, keeping the FIFO full.
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2024-08-24 21:36:29 -05:00 |
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Rose Thompson
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ee1e09a6a2
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VCU108 now boot linux at 50MHz!
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2024-08-23 17:18:47 -07:00 |
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Rose Thompson
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14083bc642
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VCU108 is not synthesizing at 50MHz. Still running into a few problems
with the new SPI sd card device.
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2024-08-23 16:17:15 -07:00 |
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Rose Thompson
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842aea157c
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Updated vc108 constraints for spi based sd card and setting 50 Mhz.
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2024-08-23 15:59:11 -07:00 |
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Rose Thompson
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167878aee4
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Commet out debug code in fpga synth script.
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2024-08-23 14:46:01 -07:00 |
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Rose Thompson
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b471913d9f
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On the way to making vcu108 work again.
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2024-08-23 14:45:22 -07:00 |
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Rose Thompson
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4d56b3ca96
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Maybe improvements to fpga synthesis.
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2024-08-23 13:00:22 -07:00 |
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Rose Thompson
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fc80bf1251
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More updates to fpga IP module names.
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2024-08-22 14:31:39 -07:00 |
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Rose Thompson
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8d40a0a092
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Changed names of fpga IP modules to match textbook. Updated boot.h to
use the correct clock speed for #DEFINE for UART in the zero stage
bootloader.
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2024-08-22 13:56:50 -07:00 |
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Rose Thompson
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faffecf891
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Merge branch 'main' of github.com:openhwgroup/cvw
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2024-08-21 11:02:17 -07:00 |
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Rose Thompson
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01b623b8c4
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Merge branch 'main' of github.com:openhwgroup/cvw
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2024-08-21 11:02:08 -07:00 |
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Rose Thompson
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113d71f1a0
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More name updates.
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2024-08-21 10:51:24 -07:00 |
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Rose Thompson
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f603d21826
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Updated my name in multiple locations.
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2024-08-21 10:50:39 -07:00 |
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Jacob Pease
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d8b75440b6
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With Naiche's help, we fixed the SPI controllers clock polarity and phase settings. Added conditions to the SPI regression tests.
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2024-08-20 16:24:37 -05:00 |
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Jacob Pease
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baad4e0fd2
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With Naiche's help, we fixed the SPI controllers clock polarity and phase settings. Added conditions to the SPI regression tests.
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2024-08-20 16:24:37 -05:00 |
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Jacob Pease
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43b17b5058
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Update SPI peripheral to accept writes to FIFO always. Worked on this together with Naiche and Rose.
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2024-08-20 14:40:50 -05:00 |
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Jacob Pease
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9ac889e3e8
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Update SPI peripheral to accept writes to FIFO always. Worked on this together with Naiche and Rose.
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2024-08-20 14:40:50 -05:00 |
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Jacob Pease
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9fae5dfc0a
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Added dynamic SDC Clock selector in bootloader code.
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2024-08-20 12:19:49 -05:00 |
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Jacob Pease
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4a1abb1d17
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Added dynamic SDC Clock selector in bootloader code.
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2024-08-20 12:19:49 -05:00 |
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Jordan Carlin
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4d68664e32
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FPGA Makefile refactoring
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2024-08-15 11:58:40 -07:00 |
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Jordan Carlin
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8ca4a5f20e
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FPGA Makefile refactoring
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2024-08-15 11:58:40 -07:00 |
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Rose Thompson
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375b0d0638
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Merge pull request #902 from jordancarlin/build_zsbl
Build zsbl in main Makefile
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2024-08-15 07:49:07 -07:00 |
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Rose Thompson
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e0784b2129
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Merge pull request #902 from jordancarlin/build_zsbl
Build zsbl in main Makefile
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2024-08-15 07:49:07 -07:00 |
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Jordan Carlin
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6d77398c95
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Update linker scripts to avoid hardcoded /opt/riscv
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2024-08-09 20:15:28 -07:00 |
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Jordan Carlin
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564ce83e11
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Update linker scripts to avoid hardcoded /opt/riscv
|
2024-08-09 20:15:28 -07:00 |
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Jordan Carlin
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08506b5872
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Remove boot.mem
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2024-08-08 20:27:51 -07:00 |
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Jordan Carlin
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16e2d65865
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Remove boot.mem
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2024-08-08 20:27:51 -07:00 |
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David Harris
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77c2a86cef
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Merge pull request #869 from jordancarlin/installation
Installation and setup overhaul
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2024-08-08 15:39:23 -07:00 |
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David Harris
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bc70f0b933
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Merge pull request #869 from jordancarlin/installation
Installation and setup overhaul
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2024-08-08 15:39:23 -07:00 |
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Jacob Pease
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6e8c210e09
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Commented out rvvi debug probes in wally.tcl.
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2024-08-08 13:52:53 -05:00 |
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Jacob Pease
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8c96c06022
|
Commented out rvvi debug probes in wally.tcl.
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2024-08-08 13:52:53 -05:00 |
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Jacob Pease
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660da55451
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Turned off RVVI by default.
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2024-08-08 13:50:11 -05:00 |
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Jacob Pease
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ed0c826d74
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Turned off RVVI by default.
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2024-08-08 13:50:11 -05:00 |
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Jordan Carlin
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357175f1c8
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Merge branch 'main' of https://github.com/openhwgroup/cvw into installation
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2024-08-07 20:22:55 -07:00 |
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Jordan Carlin
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76eef03fe4
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Merge branch 'main' of https://github.com/openhwgroup/cvw into installation
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2024-08-07 20:22:55 -07:00 |
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Jacob Pease
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f8f16d2d34
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Added and extra header and changed the comments to be accurate in ram1p1rwbe.sv
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2024-08-06 17:36:42 -05:00 |
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Jacob Pease
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2dc7e0f76f
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Added and extra header and changed the comments to be accurate in ram1p1rwbe.sv
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2024-08-06 17:36:42 -05:00 |
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Jacob Pease
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89ecc10451
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Added header to new bootloader files.
|
2024-08-06 17:28:50 -05:00 |
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Jacob Pease
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280b5baa59
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Added header to new bootloader files.
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2024-08-06 17:28:50 -05:00 |
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Jacob Pease
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9f5c3fb66a
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Removed line referring to local file in wally.tcl.
|
2024-08-06 17:11:08 -05:00 |
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Jacob Pease
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954e21148f
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Removed line referring to local file in wally.tcl.
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2024-08-06 17:11:08 -05:00 |
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Jacob Pease
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11ca2567b8
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Merge branch 'main' of github.com:openhwgroup/cvw into spiboot
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2024-08-06 17:09:39 -05:00 |
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Jacob Pease
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af2344d2d5
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Merge branch 'main' of github.com:openhwgroup/cvw into spiboot
|
2024-08-06 17:09:39 -05:00 |
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Jacob Pease
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8b85a5c34a
|
SD card is now mountable on the fpga. The relevant files have been added. The most important changes are in the buildroot linux configuration and device tree.
|
2024-08-06 16:57:57 -05:00 |
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Jacob Pease
|
665396fdb3
|
SD card is now mountable on the fpga. The relevant files have been added. The most important changes are in the buildroot linux configuration and device tree.
|
2024-08-06 16:57:57 -05:00 |
|
Jacob Pease
|
173562d6f4
|
Added file necessary to split boot.mem into boot.mem and data.mem.
|
2024-08-02 15:36:06 -05:00 |
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Jacob Pease
|
ad9c98c19c
|
Added file necessary to split boot.mem into boot.mem and data.mem.
|
2024-08-02 15:36:06 -05:00 |
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