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Author SHA1 Message Date
bbracker
2cd0f19129 remove deprecated mem signals 2021-03-05 14:27:38 -05:00
bbracker
420c9a11c2 refactored sim file 2021-03-05 14:25:16 -05:00
bbracker
62dd9e3075 first merge of ahb fix 2021-03-05 14:24:22 -05:00
Noah Boorstin
464c1de03d busybear: slight testbench update 2021-03-05 19:00:40 +00:00
Thomas Fleming
97e9baa316 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2021-03-05 13:35:44 -05:00
Thomas Fleming
85dcbee86b Place tlb parameters into constant header file 2021-03-05 13:35:24 -05:00
Thomas Fleming
e48dc38869 Export SATP_REGW from csrs to MMU modules 2021-03-05 01:22:53 -05:00
Noah Boorstin
0af002eb2f busybear: make CSRs only weird for us 2021-03-05 00:46:32 +00:00
Noah Boorstin
7208b9bcf2 busybear: better implenetation of sim-busybear-batch 2021-03-05 00:39:03 +00:00
Ross Thompson
a982ad7a9a Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-03-04 17:31:27 -06:00
Ross Thompson
7902c3fdb6 updated the function radix to look at wally signals. 2021-03-04 17:31:12 -06:00
Jarred Allen
5da98b5381 Partial progress towards compressed instructions 2021-03-04 18:30:26 -05:00
Noah Boorstin
cfcd7d1518 busybear: make imperas tests work again 2021-03-04 22:44:49 +00:00
Katherine Parry
5374dca1b9 fixed various bugs 2021-03-04 22:20:39 +00:00
Katherine Parry
4591b25c86 fixed various bugs 2021-03-04 22:20:28 +00:00
Katherine Parry
6fa2bc8efe fixed various bugs 2021-03-04 22:20:23 +00:00
Katherine Parry
10b179399c fixed various bugs 2021-03-04 22:20:02 +00:00
Katherine Parry
8e3b74c772 fixed various bugs 2021-03-04 22:19:21 +00:00
Katherine Parry
4e6b35c8b2 fixed various bugs 2021-03-04 22:18:47 +00:00
Katherine Parry
3c86d0912a fixed various bugs 2021-03-04 22:18:19 +00:00
Ross Thompson
5b7f0772ca Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-03-04 16:06:22 -06:00
Jarred Allen
b0f4d8e8d4 Remove rd2, working for non-compressed 2021-03-04 16:46:43 -05:00
Brett Mathis
b5a08e496f Pipelined functional units for FPU 2021-03-04 14:30:11 -06:00
Thomas Fleming
38bd683f2d Merge branch 'walker' into main 2021-03-04 15:27:03 -05:00
Noah Boorstin
5c456e2d7f busybear: comment out instraccessfaultf for imem for now 2021-03-04 20:26:41 +00:00
Thomas Fleming
c6a80c17e5 Add reference output for mmu test 2021-03-04 15:17:49 -05:00
Noah Boorstin
fde94f9057 Merge branch 'main' into busybear 
Conflicts:
	wally-pipelined/src/uncore/imem.sv
 2021-03-04 20:16:03 +00:00
Ross Thompson
619bbd9d83 Merge branch 'bp' into main 
Concerns:
1. I don't think the correct data buses are going to the multiplier.
2. I'm not sure the FlushF signal is correct.
 2021-03-04 13:35:46 -06:00
Ross Thompson
a8cd4f2b2e Fixed forwarding around the 2 bit predictor. 2021-03-04 13:01:41 -06:00
Thomas Fleming
97da55e7ce Fix some constants in virtual memory test 2021-03-04 13:19:55 -05:00
Shreya Sanghai
f95a1eadd9 fixed bugs 2021-03-04 12:59:45 -05:00
Shreya Sanghai
7cd8f1a592 added performance counters 2021-03-04 11:42:52 -05:00
bbracker
7852d866ef JALR testing 2021-03-04 10:37:30 -05:00
bbracker
5de23fcbe0 changed test maker to output trace files for debug 2021-03-04 10:36:04 -05:00
Ross Thompson
d0223da2f7 Converted to using the BTB to predict the instruction class. 2021-03-04 09:23:35 -06:00
Teo Ene
2accb70370 Slightly modified exe2memfile.pl script 2021-03-04 07:51:25 -06:00
Teo Ene
27a807db95 Added stop to coremark_bare testbench 2021-03-04 07:47:07 -06:00
Teo Ene
95ce4b7daa Edited assemby of bare-metal coremark to make it run 2021-03-04 07:45:40 -06:00
Teo Ene
2723b21988 Linux CoreMark and baremetal CoreMark split into two separate tests/configs 2021-03-04 07:44:33 -06:00
Teo Ene
80f6d6c944 Linux CoreMark is operational 2021-03-04 05:58:18 -06:00
Thomas Fleming
8c410b6fbe Install dtlb in dmem 2021-03-04 03:30:06 -05:00
Thomas Fleming
1a2db17ee5 Install tlb into ifu 2021-03-04 03:11:34 -05:00
Thomas Fleming
ab6ae6d3f1 Merge branch 'tlb_toy' into main 2021-03-04 02:41:11 -05:00
Thomas Fleming
7a9f866120 Move tlb into mmu directory 2021-03-04 02:39:08 -05:00
Teo Ene
b15ef47d24 Fix to 32-bit option of commit 2d40898158 2021-03-04 01:33:34 -06:00
Teo Ene
0c009fb1e6 In the process of updating coremark.RV64I program to work with Dr. Harris's perl script. Commiting to make it easier to switch branches 2021-03-04 01:27:05 -06:00
Thomas Fleming
d821a1dbfa Merge branch 'main' into tlb_toy 2021-03-04 01:18:04 -05:00
Thomas Fleming
c03b540956 Generalize tlb module 
- number of tlb entries is now parameterized
- tlb now supports rv64i
 2021-03-04 01:13:31 -05:00
Teo Ene
a82a123069 Implemented fix disucssed with Elizabeth 2021-03-03 18:17:53 -06:00
Thomas Fleming
692d4152fa Begin hardware page table walker 2021-03-03 17:13:45 -05:00