Rose Thompson
bb072fba84
Fixed the buildroot issue.
2024-04-06 18:25:53 -05:00
Rose Thompson
d0d1166e3f
Got the separation of the -G and +variable arguments in the questa do file.
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regression still runs.
2024-04-06 18:04:48 -05:00
Rose Thompson
cdcff9d368
Updated sim-wally to work with new run scripts.
2024-04-06 16:32:07 -05:00
Rose Thompson
41845ec17e
Fixed issues around missing directories.
2024-04-06 16:29:58 -05:00
Rose Thompson
46fdfde7ec
Removed unnecessary display from testbench.
2024-04-06 16:10:18 -05:00
Rose Thompson
8885c32f7c
Merge branch 'main' of https://github.com/openhwgroup/cvw
2024-04-06 15:55:00 -05:00
Rose Thompson
0a13cdf1d1
Merge pull request #710 from davidharrishmc/dev
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Reorganized regression to support multiple simulations
2024-04-06 15:54:12 -05:00
David Harris
c73a48cf22
Removed unused wave-dos
2024-04-06 13:52:13 -07:00
David Harris
e8111da88a
Removed unused old regression-wally
2024-04-06 13:47:44 -07:00
David Harris
6b844a2e6e
Added GUI support and removed unused wave files
2024-04-06 13:43:06 -07:00
David Harris
d3d39d39d0
Buildroot regression passing
2024-04-06 11:50:25 -07:00
David Harris
3c855e3e90
Passing arguments to buildroot, not yet checking result correctly
2024-04-06 11:42:41 -07:00
David Harris
b3f007ec7f
Working on buildroot in regression
2024-04-06 11:11:22 -07:00
David Harris
ac9a21873d
Pass TEST to testbench with +TEST=<name> rather than -G TEST=<name> so that we don't have to recompile for every new test
2024-04-06 10:34:21 -07:00
David Harris
347df26713
Fixed regression running; buildroot pending
2024-04-06 09:46:56 -07:00
David Harris
9ee7544d3c
TestFloat running; normal testbench broken
2024-04-06 09:28:07 -07:00
David Harris
4b19f6d542
testfloat running through wsim; moved lint, regression, wsim to bin directory so we don't need ./
2024-04-06 08:22:39 -07:00
David Harris
4cc9dd7583
regression-wally refactoring to support mulitple simulators
2024-04-05 21:45:56 -07:00
David Harris
65fc8f6d51
Merge pull request #709 from slmnemo/main
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Added ability to build linux testvectors directly using the makefile in the linux directory; UART outfile when performing a Linux boot test on the testbench
2024-04-05 21:42:57 -07:00
slmnemo
d107a42e8c
Replaced rewrite command with system rm command for uart file. Fixed comment on line 573
2024-04-05 21:39:41 -07:00
slmnemo
e631ae8c2d
Fixed sudo permissions in Linux Makefile, added nosudo versions of sudo commands
2024-04-05 21:38:30 -07:00
slmnemo
45cf997154
Removed extraneous whitespace
2024-04-05 21:05:10 -07:00
slmnemo
2fcae601a9
Replaced funky rewrite call with file removal
2024-04-05 20:59:08 -07:00
slmnemo
37716f1b56
Removed redundant lines from linux Makefile; gitignore
2024-04-05 20:53:52 -07:00
slmnemo
d89a187ce8
Fixed commit where Linux Makefile always built Linux into repo instead of into shared directory.
2024-04-05 20:44:11 -07:00
David Harris
7b56809323
wsim runs a Questa sim
2024-04-05 19:08:14 -07:00
David Harris
a1d3e5b15e
Moved do files into questa
2024-04-05 18:42:48 -07:00
David Harris
a8a03d6011
Reorganizing sim directory for multiple simulators
2024-04-05 18:19:46 -07:00
slmnemo
3ee25c8936
Merged testbench changes
2024-04-05 17:20:03 -07:00
slmnemo
5378b61eb2
Added UART output file buildroot_uart.out for Linux test 'buildroot'.
2024-04-05 17:18:03 -07:00
David Harris
8b7d987b58
Merge pull request #708 from Shreesh-Kulkarni/patch-3
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CSV file extraction/tabulation support for Coremark Sweep.
2024-04-05 10:48:50 -07:00
Shreesh Kulkarni
bace06e356
Added CSV file extraction/tabulation support for Coremark Sweep.
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modified coremark_sweep.py to extract a csv file in the working directory with all the required Coremark performance metrics. Both 32-bit and 64-bit supported.
2024-04-05 23:16:11 +05:30
Rose Thompson
23e51e7277
starting on functional coverage for fence.i.
2024-04-04 15:44:57 -05:00
Rose Thompson
cc287a037a
Merge pull request #706 from davidharrishmc/dev
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Verilator for TestFloat, fix issue 655 about multiplications failing on f-only configuration
2024-04-03 22:06:35 -05:00
David Harris
499e4d6a6e
Changed 2 to 1 in FmaPreResultSubnorm logic, fixing issue 655 about multiply on f/fh. Not entirely confident this is the right change, but can't find any failures. See https://docs.google.com/document/d/1p7zb4Vvd1LMBLRgEpXjHyp7etCaFaiBVrBZJM8jediE/edit
2024-04-03 17:28:31 -07:00
David Harris
ccd0e9cd0c
Clean up testbench-fp for Verilator
2024-04-03 17:26:41 -07:00
David Harris
ae8d581f4e
Started implementing Verilator for testfloat
2024-04-03 17:09:19 -07:00
David Harris
79cccfca82
Progress toward run_vcs
2024-04-03 14:05:07 -07:00
David Harris
811e760d7e
Merge pull request #705 from Divya2030/main
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vcs testbench running
2024-04-03 10:43:50 -07:00
Divya2030
aa6eacbce5
Merge branch 'openhwgroup:main' into main
2024-04-03 10:40:30 -07:00
Divya2030
135f3b6f8f
vcs testbench
2024-04-03 10:39:02 -07:00
Rose Thompson
649d5a5717
Merge pull request #704 from davidharrishmc/dev
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Verilator speedup
2024-04-03 11:42:25 -05:00
David Harris
8755966f50
Incorporated Kunlin's Verilator hack so testbench runs 110x faster. Isolated within ifdef VERILATOR to make it easier to remove when Verilator issue 4967 is resolved
2024-04-03 07:23:02 -07:00
David Harris
8741b01818
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2024-04-03 06:51:24 -07:00
David Harris
929eb0430c
Testbench uses posedge control signals to speed up Verilator
2024-04-03 06:51:18 -07:00
David Harris
864d55ef32
Merge pull request #702 from Karl-Han/bump_arch_test
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Bump the riscv-arch-test to the latest version with 0 fail.
2024-04-02 19:09:29 -07:00
David Harris
77a4678ac7
Merge pull request #703 from ross144/main
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Fixed external memory. Fixes bug #697
2024-04-01 10:33:23 -07:00
Rose Thompson
c11d7ea55e
Fixed bug in the testbench which did not allow external memory to work correctly.
2024-04-01 10:59:40 -05:00
Kunlin Han
6772bf9131
Bump the riscv-arch-test to the latest version with 0 fail.
2024-04-01 00:02:57 -07:00
David Harris
bec35ecd33
Merge pull request #700 from ross144/main
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Changed D suffix to Delay in ebufsmarb.
2024-03-29 17:32:34 -07:00
