Commit Graph

78 Commits

Author SHA1 Message Date
David Harris
9e839988dc Gated MDU to save power; doesn't seem to have affected simulation time 2023-06-15 12:17:23 -07:00
David Harris
a62211bad1 Gated inputs to BMU when inactive to save power and simulation time 2023-06-15 11:56:59 -07:00
Ross Thompson
b91b54589e Updated a large number of the source files to use parameters rather than `defines. Based on Lim's work. So far there is no simulation slow down. 2023-05-24 14:05:44 -05:00
Limnanthes Serafini
034c289a36 Misc typo and indent fixing. 2023-04-13 16:54:15 -07:00
David Harris
4e2d80476e Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-04-03 06:13:16 -07:00
Kevin Kim
8252706691 removed comparator flag to ALU 2023-04-02 21:14:31 -07:00
David Harris
fd0c9e973d Coverage improvements in ieu, hazard units 2023-03-31 08:33:46 -07:00
Alec Vercruysse
46df428e56 add check for legal funct3 for IW instructions 2023-03-28 15:59:48 -07:00
Ross Thompson
46b1bca4fc Fixed all tap/space issue in RTL. 2023-03-24 17:32:25 -05:00
David Harris
576545e328 ALUControl Elimination 2023-03-24 08:10:48 -07:00
David Harris
f648be8ee2 Merged ALUOp into ALUControl to simplify ALU mux 2023-03-24 07:28:42 -07:00
David Harris
e8d6073eca BMU simplifications 2023-03-24 06:18:06 -07:00
Kevin Kim
fce62fc213 formatting 2023-03-22 10:26:04 -07:00
Kevin Kim
3f46dff23e Merge branch 'main' of https://github.com/openhwgroup/cvw into bit-manip 2023-03-21 11:20:05 -07:00
Kevin Kim
b394e343f6 format + min/max structural mux 2023-03-20 09:37:57 -07:00
David Harris
6922298f21 Replaced FenceM with InvalidateICacheM for event counting of fence.i 2023-03-18 09:24:31 -07:00
Kevin Kim
0ca530fffd Merge branch 'bit-manip' into illegal_specific 2023-03-07 14:07:59 -08:00
Kevin Kim
26cb1857f3 specifc instruction handling for B's
- Added BALUSrcBD, BaseALUSrcB for distinguishing between base instruction I/IW and Bitmanip instruction I/IW
2023-03-07 13:58:08 -08:00
Kip Macsai-Goren
2ec3c741ef Merge branch 'bit-manip' of github.com:kipmacsaigoren/cvw into bit-manip 2023-03-07 13:44:51 -08:00
Kip Macsai-Goren
f178c90c02 Merge branch 'main' of github.com:kipmacsaigoren/cvw into bit-manip 2023-03-07 13:44:19 -08:00
Kevin Kim
bd9b9970f5 Merge remote-tracking branch 'origin' into illegal_specific 2023-03-07 11:30:36 -08:00
Kevin Kim
81198ce6f6 reverted backing to working version 2023-03-07 00:29:58 -08:00
Kevin Kim
5637897dce reverted to working version 2023-03-07 00:28:07 -08:00
David Harris
7ecf4cdea8 Fixed bug about rv64 shifts only using 6 bits of funct7 2023-03-06 13:10:51 -08:00
David Harris
7e0c96cdcc Simplified decoder default to illegal instruction 2023-03-06 11:21:11 -08:00
David Harris
c2efdbdbbb More detailed decoding of load/store/branch/jump 2023-03-06 11:15:48 -08:00
David Harris
a56557d847 Improved decoding illegal instructions in controller 2023-03-06 11:02:42 -08:00
Kevin Kim
ee66b5fb4a formatting
- reverted back to ALUResult signal in alu.sv
2023-03-06 06:19:01 -08:00
Kevin Kim
6b25c64a1f BSelect from OH encoding to Binary 2023-03-04 23:19:31 -08:00
Kevin Kim
9494cf9340 removed rotate signal in datapath and instead packed into the new BALUControl Signal
- BALUControl contains Rotate, Mask, PreShift signals to select from the respective generation muxes in the ALU
2023-03-04 22:44:03 -08:00
Kevin Kim
72de867e65 Rotate signal now gets generated in bmu ctrl 2023-03-03 22:57:49 -08:00
Kevin Kim
0403cfd41a removed redundant signals in controller 2023-03-03 21:52:25 -08:00
Kevin Kim
8dd39fbcfb b controller generates comparison signed flag and controller branch signed logic updated accordingly 2023-03-03 17:12:29 -08:00
Kevin Kim
5e01f86bc5 sltD signal debug. Passes regression 2023-03-03 12:44:33 -08:00
Kevin Kim
c836eea17c sltD logic optimize 2023-03-03 12:35:40 -08:00
Kevin Kim
d6f8c1dd29 Merge branch 'bctrlmigrate' of https://github.com/kipmacsaigoren/cvw into bctrlmigrate 2023-03-03 09:54:08 -08:00
Kevin Kim
1c55d4a8d5 Merge branch 'openhwgroup:main' into bctrlmigrate 2023-03-03 09:53:59 -08:00
Kevin Kim
422b428cba removed outdated b-signals in controller 2023-03-03 08:45:42 -08:00
Kevin Kim
19410b4196 migrated B-subarith logic into b controller 2023-03-03 08:40:29 -08:00
Kevin Kim
2c3271dd62 began subarith configurability optimization in controller 2023-03-03 08:27:11 -08:00
Ross Thompson
cfca77172e Added fence counter. 2023-03-02 23:29:20 -06:00
Kevin Kim
b21ca2fba0 bug fix, more elegant logic changes in controller 2023-03-02 16:00:56 -08:00
Kevin Kim
910eeea3ff removed main instruction decoder dependence on bmu controller 2023-03-02 15:28:33 -08:00
Kevin Kim
05b329dd6a added bitmanip illegal instruction signal 2023-03-02 15:09:55 -08:00
Kevin Kim
24b0b83d52 moved ALUControlD into configurable block 2023-03-02 12:17:03 -08:00
Kevin Kim
0f60505179 moved SubArith and RegWriteE into configurable block 2023-03-02 12:15:57 -08:00
Kevin Kim
e62a752522 fixed controller lint, changed byte unit mux select name and input width 2023-03-02 11:36:12 -08:00
Kip Macsai-Goren
58ab6ec805 Merge remote-tracking branch 'upstream/main' into bit-manip 2023-02-28 14:41:51 -08:00
Kevin Kim
b61d881c1b added BRegWrite, BW64, BALUOp signals to bctrl and controller
-TODO: Main decode in bmuctrl must assert these 3 signals
2023-02-28 11:54:10 -08:00
Kevin Kim
692e406976 changed shifter source select signal name 2023-02-28 11:41:40 -08:00