DTowersM
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abb6ba97cf
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removed delapidated signals SIE_REGW SIP_REGW TimerIntM SwIntM
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2022-05-31 20:10:56 +00:00 |
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DTowersM
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ea07588999
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added embench tests to tests.vh
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2022-05-31 20:08:04 +00:00 |
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DTowersM
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4bbacd3742
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dummy start trigger and stop trigger support for make file
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2022-05-31 20:05:51 +00:00 |
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DTowersM
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74b05d371b
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-05-26 23:36:49 +00:00 |
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DTowersM
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547537d1d3
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embench addition: added options to create .elf, .objdump, .memfile, .addr and .lab files from the executible in the embench build directory
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2022-05-26 23:36:38 +00:00 |
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cturek
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f7a3855af1
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fixed sizing issues in expcalc
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2022-05-26 22:35:17 +00:00 |
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Madeleine Masser-Frye
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cba93aa1c0
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally
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2022-05-26 22:24:43 +00:00 |
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Madeleine Masser-Frye
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b765a379e3
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added square delay area plot
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2022-05-26 22:24:39 +00:00 |
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cturek
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a025014650
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Implemented on-the-fly conversion for unsigned numbers
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2022-05-26 22:20:43 +00:00 |
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Madeleine Masser-Frye
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e76986b31e
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fixed synth scraping, best delay plotting
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2022-05-26 20:51:00 +00:00 |
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Katherine Parry
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b13c3d5385
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-05-26 20:48:30 +00:00 |
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Katherine Parry
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550c4d380c
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fcvt.sv paramaterized
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2022-05-26 20:48:22 +00:00 |
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DTowersM
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ea882e7271
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-05-26 19:05:21 +00:00 |
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DTowersM
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a983791d64
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fixed indent spacing (cosmetic change)
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2022-05-26 19:04:21 +00:00 |
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cturek
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0f1da722bf
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Set up the divider for on-the-fly conversion
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2022-05-26 16:45:28 +00:00 |
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slmnemo
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1d3752b0b3
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-05-25 17:41:04 -07:00 |
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slmnemo
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466fb71add
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added a todo to riscv-wally so that long buildroot looks for a successful boot rather than a specific instruction
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2022-05-25 17:40:57 -07:00 |
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DTowersM
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41f6233a70
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-05-26 00:12:46 +00:00 |
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slmnemo
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3efe43af60
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-05-25 17:11:03 -07:00 |
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slmnemo
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5a9e3a852a
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see commit 9042cc3c
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2022-05-25 17:10:59 -07:00 |
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Katherine Parry
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f4b9ade942
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added fcvt.sv
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2022-05-26 00:10:51 +00:00 |
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DTowersM
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aa574d545c
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Merge branch 'embench' into main
embench contained the working makefiles for embench and is being merged into main as it working and done
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2022-05-26 00:10:50 +00:00 |
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DTowersM
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5e87506772
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working makefile for embench and removed testbench-f64
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2022-05-26 00:08:18 +00:00 |
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slmnemo
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17dff315f4
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-05-25 17:03:26 -07:00 |
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slmnemo
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d43d340e31
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added logic to prevent cache line length from exceeding the max size of a burst.
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2022-05-25 17:03:15 -07:00 |
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cturek
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366cd5f1d5
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Renamed variables for readability
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2022-05-26 00:01:51 +00:00 |
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cturek
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650779318d
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Fixed exponent verification, added sign module and added sign tests
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2022-05-25 23:36:21 +00:00 |
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Katherine Parry
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c264585fe8
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single and double conversions pass all tests
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2022-05-25 23:02:02 +00:00 |
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Madeleine Masser-Frye
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309f85bb38
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major revisions to ppaAnalyze
synths as namedtuples, plotting pulls from csv, support for multiple techs
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2022-05-25 20:37:54 +00:00 |
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Madeleine Masser-Frye
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c8892f2847
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ppaAnalyze: docstrings and tsmc28 plotting
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2022-05-25 13:52:20 +00:00 |
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Madeleine Masser-Frye
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7d1448d2ad
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added support for tsmc28, fixed ff modules/analysis for timing
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2022-05-25 06:44:22 +00:00 |
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slmnemo
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cd9f0cd6bd
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fixed a comment spelling typo
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2022-05-23 19:24:28 -07:00 |
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Katherine Parry
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18bdaf0179
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-05-23 23:11:41 +00:00 |
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Katherine Parry
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37e74648a9
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added exponents to srt divider
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2022-05-23 23:07:27 +00:00 |
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David Harris
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2d175e2a37
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Checked in qst2.c from James
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2022-05-23 20:26:05 +00:00 |
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Ross Thompson
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1dde9db2ce
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-05-22 23:54:33 -05:00 |
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Ross Thompson
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13f7f48776
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Possible plic fix?
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2022-05-22 23:47:01 -05:00 |
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Madeleine Masser-Frye
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99aa110615
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-05-22 23:23:39 +00:00 |
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Madeleine Masser-Frye
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378523087f
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added widths for csa in ppa
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2022-05-22 23:23:02 +00:00 |
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Ross Thompson
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ff8e158ec4
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-05-22 10:55:33 -05:00 |
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Ross Thompson
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848abf29b5
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Fixed receive fifo ITNR bug.
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2022-05-22 10:55:28 -05:00 |
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Ross Thompson
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1318f702cf
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Added more debug signals to uart.
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2022-05-21 19:47:40 -05:00 |
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Ross Thompson
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db85afcd2d
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Added more plic debugging signals.
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2022-05-21 14:04:08 -05:00 |
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Ross Thompson
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6cae5aa88f
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Updated the fpga constraints.
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2022-05-21 13:32:03 -05:00 |
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Madeleine Masser-Frye
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0bcae85792
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally
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2022-05-21 09:53:31 +00:00 |
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Madeleine Masser-Frye
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fcaf032a0d
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ppa updates
added widths to modules, automated frequency sweep synthesis, added slack violation color coding to plots
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2022-05-21 09:53:26 +00:00 |
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slmnemo
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a5d5bd272b
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changes suggested by ben, hopefully fixing buildroot (which is now not running)
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2022-05-20 18:42:38 -07:00 |
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Katherine Parry
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6bc31f2e78
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Fixed unpacker bug LT EQ LE pass testfloat
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2022-05-20 17:19:50 +00:00 |
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Madeleine Masser-Frye
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230aae000e
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fixed dynamic energy units
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2022-05-20 01:59:19 +00:00 |
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slmnemo
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af675bbefb
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-05-19 18:31:56 -07:00 |
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