Rose Thompson
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113d71f1a0
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More name updates.
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2024-08-21 10:51:24 -07:00 |
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Rose Thompson
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f603d21826
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Updated my name in multiple locations.
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2024-08-21 10:50:39 -07:00 |
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Jacob Pease
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938879c5a4
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Update PREADY signal to not stall during transmission on reads to read only registers.
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2024-08-21 12:39:01 -05:00 |
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David Harris
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6f19ad554f
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Merge pull request #923 from 10x-Engineers/rvvi_setup
Adding regression for RVVI FC
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2024-08-21 05:22:38 -07:00 |
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David Harris
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67c7a559c3
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Merge pull request #923 from 10x-Engineers/rvvi_setup
Adding regression for RVVI FC
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2024-08-21 05:22:38 -07:00 |
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Huda-10xe
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b315a8e338
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Adding regression commands to Makefile
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2024-08-21 15:45:23 +05:00 |
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Huda-10xe
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ca21b865b3
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Adding regression commands to Makefile
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2024-08-21 15:45:23 +05:00 |
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Rose Thompson
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4b7a498ada
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Merge pull request #922 from JacobPease/main
SPI Clock Polarity and Phase fixes
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2024-08-20 14:54:53 -07:00 |
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Rose Thompson
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91a41ed791
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Merge pull request #922 from JacobPease/main
SPI Clock Polarity and Phase fixes
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2024-08-20 14:54:53 -07:00 |
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Jacob Pease
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b7edffdfd4
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Removed now inaccurate comments.
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2024-08-20 16:38:15 -05:00 |
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Jacob Pease
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f960662e93
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Removed now inaccurate comments.
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2024-08-20 16:38:15 -05:00 |
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Jacob Pease
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77d75f34f8
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Merge branch 'main' of github.com:openhwgroup/cvw
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2024-08-20 16:24:46 -05:00 |
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Jacob Pease
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cacd0063d7
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Merge branch 'main' of github.com:openhwgroup/cvw
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2024-08-20 16:24:46 -05:00 |
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Jacob Pease
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d8b75440b6
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With Naiche's help, we fixed the SPI controllers clock polarity and phase settings. Added conditions to the SPI regression tests.
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2024-08-20 16:24:37 -05:00 |
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Jacob Pease
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baad4e0fd2
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With Naiche's help, we fixed the SPI controllers clock polarity and phase settings. Added conditions to the SPI regression tests.
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2024-08-20 16:24:37 -05:00 |
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Jacob Pease
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43b17b5058
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Update SPI peripheral to accept writes to FIFO always. Worked on this together with Naiche and Rose.
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2024-08-20 14:40:50 -05:00 |
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Jacob Pease
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9ac889e3e8
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Update SPI peripheral to accept writes to FIFO always. Worked on this together with Naiche and Rose.
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2024-08-20 14:40:50 -05:00 |
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Rose Thompson
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a810ef8513
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Merge pull request #920 from JacobPease/main
Added dynamic SDC Clock selector in bootloader code.
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2024-08-20 10:23:13 -07:00 |
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Rose Thompson
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5e61e9339d
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Merge pull request #920 from JacobPease/main
Added dynamic SDC Clock selector in bootloader code.
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2024-08-20 10:23:13 -07:00 |
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Jacob Pease
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9fae5dfc0a
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Added dynamic SDC Clock selector in bootloader code.
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2024-08-20 12:19:49 -05:00 |
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Jacob Pease
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4a1abb1d17
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Added dynamic SDC Clock selector in bootloader code.
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2024-08-20 12:19:49 -05:00 |
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David Harris
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f4871c14f7
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Merge pull request #918 from jordancarlin/fp_tests_make
Testfloat vector generation refactoring + root Makefile cleanup
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2024-08-17 04:32:45 -07:00 |
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David Harris
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d3621318c0
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Merge pull request #918 from jordancarlin/fp_tests_make
Testfloat vector generation refactoring + root Makefile cleanup
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2024-08-17 04:32:45 -07:00 |
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David Harris
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ef7028154c
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Merge pull request #873 from Shreesh-Kulkarni/main
Modified riscv-isacov and riscv-ctg files to support some missing quad instructions.
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2024-08-16 11:10:35 -07:00 |
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David Harris
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32a8a6b3d1
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Merge pull request #873 from Shreesh-Kulkarni/main
Modified riscv-isacov and riscv-ctg files to support some missing quad instructions.
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2024-08-16 11:10:35 -07:00 |
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Rose Thompson
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362d4313a3
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Merge pull request #919 from jordancarlin/riscof_jobs
Set RISCOF jobs based on number of cores
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2024-08-16 08:53:39 -07:00 |
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Rose Thompson
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ba3a2c27a7
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Merge pull request #919 from jordancarlin/riscof_jobs
Set RISCOF jobs based on number of cores
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2024-08-16 08:53:39 -07:00 |
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Jordan Carlin
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e98330bcdf
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Merge branch 'main' of https://github.com/openhwgroup/cvw into script_updates
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2024-08-15 19:10:51 -07:00 |
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Jordan Carlin
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d6110c3d0b
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Set riscof jobs based on number of cores
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2024-08-15 19:02:48 -07:00 |
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Jordan Carlin
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895e259a95
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Set riscof jobs based on number of cores
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2024-08-15 19:02:48 -07:00 |
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Jordan Carlin
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7ab99c88c8
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Fix typo
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2024-08-15 19:01:34 -07:00 |
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Jordan Carlin
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3043e0ce6e
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Fix typo
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2024-08-15 19:01:34 -07:00 |
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Jordan Carlin
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1d3edc73be
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Remove compiled softfloat binary
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2024-08-15 19:01:13 -07:00 |
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Jordan Carlin
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02f93655ba
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Remove compiled softfloat binary
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2024-08-15 19:01:13 -07:00 |
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Jordan Carlin
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3b85f92695
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Testfloat vector generation refactoring
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2024-08-15 18:53:26 -07:00 |
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Jordan Carlin
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00edbd0d95
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Testfloat vector generation refactoring
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2024-08-15 18:53:26 -07:00 |
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Jordan Carlin
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2edff68bcf
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Merge branch 'main' of https://github.com/openhwgroup/cvw into make
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2024-08-15 13:42:07 -07:00 |
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Jordan Carlin
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1c8d6c9137
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Merge branch 'main' of https://github.com/openhwgroup/cvw into make
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2024-08-15 13:42:07 -07:00 |
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Rose Thompson
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99f2f70186
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Merge pull request #916 from jordancarlin/FPGA_makefile
FPGA Makefile refactoring
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2024-08-15 12:42:04 -07:00 |
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Rose Thompson
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e8ddf601a0
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Merge pull request #916 from jordancarlin/FPGA_makefile
FPGA Makefile refactoring
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2024-08-15 12:42:04 -07:00 |
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Jordan Carlin
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4d68664e32
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FPGA Makefile refactoring
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2024-08-15 11:58:40 -07:00 |
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Jordan Carlin
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8ca4a5f20e
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FPGA Makefile refactoring
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2024-08-15 11:58:40 -07:00 |
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Jordan Carlin
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f8bb4e1c71
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Update root Makefile
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2024-08-15 11:22:32 -07:00 |
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Jordan Carlin
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09122f91c8
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Update root Makefile
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2024-08-15 11:22:32 -07:00 |
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David Harris
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3f2cbb8549
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Merge pull request #915 from jordancarlin/gitignore
Refactor gitignore
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2024-08-15 11:19:12 -07:00 |
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David Harris
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05b776219b
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Merge pull request #915 from jordancarlin/gitignore
Refactor gitignore
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2024-08-15 11:19:12 -07:00 |
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Jordan Carlin
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7b5ba5e6f1
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Refactor gitignore
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2024-08-15 11:14:22 -07:00 |
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Jordan Carlin
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d9d5fc0827
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Refactor gitignore
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2024-08-15 11:14:22 -07:00 |
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Rose Thompson
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9858061ead
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Merge pull request #914 from davidharrishmc/dev
Fix URO HPM counters not trapping on write
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2024-08-15 10:52:05 -07:00 |
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Rose Thompson
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3e773d5359
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Merge pull request #914 from davidharrishmc/dev
Fix URO HPM counters not trapping on write
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2024-08-15 10:52:05 -07:00 |
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