Rose Thompson
1629eda608
Added btbthrash to tests.vh.
2024-10-30 16:07:05 -05:00
Rose Thompson
57d1709582
The path to the zsbl was wrong all this time, but for reason was working with older versions of Ubuntu, but one 24.04 it causes vivado to not find the rom and ram.
2024-10-30 16:01:11 -05:00
Rose Thompson
eb9493d577
Merge pull request #1043 from jordancarlin/readme
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Update README for design compiler support in RHEL 9
2024-10-30 14:42:27 -05:00
Jordan Carlin
de6d219e72
Merge pull request #1045 from slmnemo/nightly_regression
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Regression fixes and nightly build changes
2024-10-30 11:59:07 -07:00
slmnemo
c105c09cde
Added jobs flag to make during nightly regression
2024-10-30 11:50:49 -07:00
Kaitlin Lucio
b9d215db76
Update regression-wally according to PR
2024-10-30 11:50:49 -07:00
slmnemo
9284dd3a9a
Changed buildrootbootsim to lockstepsim and added lockstepsim to lockstep tests in nightly
2024-10-30 11:50:49 -07:00
slmnemo
f605cb693a
Added --dry-run feature. Changed detection for buildrootboot sim when adding short buildroot tests with multiple sims to avoid unnecessary failures
2024-10-30 11:50:48 -07:00
slmnemo
43f5ec283c
Added -j6 to nightly_build to make tests quicker. Untested, git rebase -i once it is confirmed this does not affect coverage using a nightly run
2024-10-30 11:50:34 -07:00
Jacob Pease
ca1c09041a
Merge branch 'main' of github.com:openhwgroup/cvw
2024-10-30 10:37:02 -05:00
David Harris
703d6c1081
Merge pull request #1044 from coreyqh/dev
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fround* bug Fix
2024-10-30 04:11:38 -07:00
Corey Hickson
b1f340ba5c
formatting
2024-10-30 03:39:55 -07:00
Corey Hickson
b9317e7cd3
Fixed fround bug
2024-10-30 03:28:58 -07:00
Jordan Carlin
40783c1a54
Update README for design compiler support in red hat 9
2024-10-29 18:01:47 -07:00
Jacob Pease
b667581ffa
Refactored SPI peripheral based on SPI controller module. Works in tests/custom/spitest.
2024-10-29 17:50:36 -05:00
Rose Thompson
7405456de5
added script to install libncurses5 and libtinfo5 for ubuntu24.04.
2024-10-29 16:06:55 -05:00
Rose Thompson
c93cadc95c
Merge branch 'openhwgroup:main' into main
2024-10-29 15:46:25 -05:00
Rose Thompson
55cffcbc98
Merge pull request #1039 from jordancarlin/dev
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Set MTI_VCO_MODE for all Questa runs, not just with lockstep
2024-10-29 14:13:13 -05:00
Jordan Carlin
7993a87733
Add comment for MTI_VCO_MODE
2024-10-29 12:08:48 -07:00
Jordan Carlin
b8c09f9649
Set MTI_VCO_MODE for all Questa runs
2024-10-29 12:04:20 -07:00
Huda-10xe
af74635216
reverting VM to RV64VM
2024-10-29 09:44:18 -07:00
Rose Thompson
ebd357681f
Merge pull request #1037 from JacobPease/main
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Added a new spi controller design. Designed as a proof of concept to see if timing issues can be fixed. I intend to work it into existing SPI peripheral.
2024-10-29 11:15:23 -05:00
Jacob Pease
784630b945
Added wally header to spi_controller.
2024-10-29 10:53:33 -05:00
Jacob Pease
37d2f3220e
Added a new spi controller design. Designed as a proof of concept to see if timing issues can be fixed. I intend to work it into existing SPI peripheral.
2024-10-29 10:30:08 -05:00
Rose Thompson
896bb21f7c
Added potential test. btbthrash forces jump and divide instructions to occupy the same location in the btb. Instruction class prediction mispredicts ever time. This is useful incase someone changes the hazard code or fpu.
2024-10-29 09:58:53 -05:00
Huda-10xe
8515c20c15
Removing VM_Covergae from this till its complete
2024-10-29 04:25:02 -07:00
Huda-10xe
cf74954a6f
Merge branch 'main' of https://github.com/openhwgroup/cvw into rvvi_setup
2024-10-29 03:14:32 -07:00
Huda-10xe
3f94fc3ca2
Changing VM covergae name to incorporate sv32 coverpoints
2024-10-29 03:13:53 -07:00
Jordan Carlin
13df786b87
Merge pull request #1035 from davidharrishmc/dev
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Updated ImperasDV config to fix issue #1031
2024-10-28 15:58:18 -07:00
David Harris
874d5f6cce
Updated ImperasDV config to fix issue #1031
2024-10-28 15:55:34 -07:00
Huda-10xe
a6de72b5ac
Renaming VM Coverage
2024-10-28 00:34:20 -07:00
Huda-10xe
d66a613074
Renaming VM Coverage
2024-10-28 00:32:07 -07:00
David Harris
00ea3575c8
Merge pull request #1034 from Zain2050/main
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Added Zcf & Zcd in rv32/64gc
2024-10-26 09:20:23 -07:00
Zain2050
d22988b678
also added Zcd
2024-10-26 09:17:34 -07:00
Zain2050
3ba9295060
enabled Zcf in rv32gc
2024-10-26 09:06:01 -07:00
Jordan Carlin
f9b6afb4f2
Merge pull request #1033 from davidharrishmc/dev
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SPI fix, add csr functional coverage
2024-10-26 05:55:24 -07:00
David Harris
0555e58afe
Removed unnecessary display statement from testbench for DTIM versions
2024-10-26 02:12:43 -07:00
David Harris
e618596e52
Added CSR coverage
2024-10-26 02:11:40 -07:00
David Harris
1c1acc467e
Tweaked SPI to avoid breaking VCS, but the SCLK divider still doesn't produce the right frequency and SCLKenableEarly looks like it wouldn't work for SckDiv = 0
2024-10-26 02:01:09 -07:00
Jordan Carlin
dd2e73140c
Merge pull request #1029 from slmnemo/nightly-regression
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Changes to nightly regression to get it working with the current repo
2024-10-24 17:30:27 -07:00
Kaitlin Lucio
44e17efcf3
Removed unnecessary os.path.dirname in foldermanager init
2024-10-24 16:29:46 -07:00
David Harris
3f28052132
Merge pull request #1030 from slmnemo/main
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Added pool.terminate() to terminate hanging processes in regression
2024-10-24 14:55:43 -07:00
slmnemo
929f3892e0
Added code to terminate pool processes on timeout
2024-10-24 12:49:46 -07:00
David Harris
b7f702a92c
Merge pull request #1028 from coreyqh/dev
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Enabling D and ZfhD Coverage
2024-10-24 05:29:36 -07:00
Corey Hickson
885d8cb936
Enabling D and ZfhD Coverage
2024-10-24 04:53:41 -07:00
slmnemo
dfbe01084f
Fixed error where an elif was written as if in test conditionals
2024-10-23 18:39:46 -07:00
Jordan Carlin
b5730af61e
Merge pull request #1026 from davidharrishmc/dev
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Modified ImperasDV config to not print pseudo instructions; improvements for CSR coverage
2024-10-22 06:19:20 -07:00
David Harris
b848a1abfe
added no_pseudo_inst to only print regular instructions.
2024-10-22 05:26:29 -07:00
David Harris
da2310fb3e
Merge conflict in coverage.svh
2024-10-22 04:48:57 -07:00
David Harris
69cc36795b
privileged coverage updates
2024-10-22 04:45:40 -07:00
