Merge branch 'main' of github.com:openhwgroup/cvw

This commit is contained in:
Jacob Pease 2024-10-30 10:37:02 -05:00
commit ca1c09041a
2 changed files with 8 additions and 7 deletions

View File

@ -59,12 +59,12 @@ if(args.testsuite.endswith('.elf') and args.elf == ""): # No --elf argument; che
args.testsuite = fields[1] + "_" + fields[3]
else:
args.testsuite = fields[2] + "_" + fields[3]
elif ('/' in args.testsuite):
elif ('/' in args.testsuite):
args.testsuite=args.testsuite.rsplit('/', 1)[1] # strip off path if present
else:
print("ELF file not found: " + args.testsuite)
exit(1)
if(args.lockstep and not args.testsuite.endswith('.elf')):
print(f"Invalid Options. Cannot run a testsuite, {args.testsuite} with lockstep. Must run a single elf.")
exit(1)
@ -89,13 +89,14 @@ if(int(args.locksteplog) >= 1): EnableLog = 1
else: EnableLog = 0
prefix = ""
if (args.lockstep or args.lockstepverbose or args.fcov or args.fcovimp):
if (args.sim == "questa" or args.sim == "vcs"):
if (args.sim == "questa" or args.sim == "vcs"):
prefix = "IMPERAS_TOOLS=" + WALLY + "/config/"+args.config+"/imperas.ic"
if (args.sim == "questa"):
prefix = "MTI_VCO_MODE=64 " + prefix
# Force Questa to use 64-bit mode, sometimes it defaults to 32-bit even on 64-bit machines
if (args.sim == "questa"):
prefix = "MTI_VCO_MODE=64 " + prefix
if (args.lockstep or args.lockstepverbose):
if(args.locksteplog != 0): ImperasPlusArgs = " +IDV_TRACE2LOG=" + str(EnableLog) + " +IDV_TRACE2LOG_AFTER=" + str(args.locksteplog)
if(args.locksteplog != 0): ImperasPlusArgs = " +IDV_TRACE2LOG=" + str(EnableLog) + " +IDV_TRACE2LOG_AFTER=" + str(args.locksteplog)
else: ImperasPlusArgs = ""
if(args.fcovimp):
CovEnableStr = "1" if int(args.covlog) > 0 else "0"

View File

@ -76,7 +76,7 @@ module fround import cvw::*; #(parameter cvw_t P) (
assign Eeqm1 = ($signed(E) == -1);
// Logic for nonnegative mask and rounding bits
assign IMask = {1'b1, {P.NF{1'b0}}} >>> E; /// if E > Nf, this produces all 0s instead of all 1s. Hence exact handling is needed below.
assign IMask = $signed({1'b1, {P.NF{1'b0}}}) >>> E; /// if E > Nf, this produces all 0s instead of all 1s. Hence exact handling is needed below.
assign Tmasknonneg = ~IMask >>> 1'b1;
assign HotE = IMask & ~(IMask << 1'b1);
assign HotEP1 = HotE >> 1'b1;