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Fixed fround bug
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@ -76,7 +76,8 @@ module fround import cvw::*; #(parameter cvw_t P) (
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assign Eeqm1 = ($signed(E) == -1);
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// Logic for nonnegative mask and rounding bits
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assign IMask = {1'b1, {P.NF{1'b0}}} >>> E; /// if E > Nf, this produces all 0s instead of all 1s. Hence exact handling is needed below.
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// assign IMask = {1'b1, {P.NF{1'b0}}} >>> E; /// if E > Nf, this produces all 0s instead of all 1s. Hence exact handling is needed below.
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assign IMask = $signed({1'b1, {P.NF{1'b0}}}) >>> E;
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assign Tmasknonneg = ~IMask >>> 1'b1;
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assign HotE = IMask & ~(IMask << 1'b1);
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assign HotEP1 = HotE >> 1'b1;
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