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56 Commits

Author SHA1 Message Date
David Harris
db330b35b2 Removed unnecessary muxes from shiftcorrection; changed flag to --nightly in lint-wally 2024-04-16 20:57:49 -07:00
Jordan Carlin
cbd61d008f
fix size of CVTLEN to support fcvtmod.w.d; add max macro to config-shared.vh 2024-03-14 14:07:15 -07:00
Rose Thompson
3cf6a19729
Merge branch 'main' into main 2024-03-10 10:48:21 -05:00
Kevin Kim
2547e4c6d1 divider still works with NF+2 2024-03-03 11:17:51 -08:00
KelvinTr
01c45ab9d7 Fixed K extension changes 2024-02-28 17:05:08 -06:00
David Harris
dfee790ad7 Fixed derivative generation when derivs don't already exist. Fixed lint to print success when no failures. Added Zfh fma tests. Some fp tests not running yet. 2024-02-06 12:35:56 -08:00
David Harris
a4ca024025 Lint progress 2024-01-31 20:03:14 -08:00
David Harris
0abfe5cb55 Fixed some lint errors in derived configs 2024-01-31 11:39:59 -08:00
David Harris
f37c7bb1f6 Incorporated RAM_LATENCY and BURST_EN as parameters rather than define in code. Still need to update testbench to use this 2024-01-30 06:27:18 -08:00
David Harris
d801bf5d6c
Revert "more shiftcorrection bug fixes" 2024-01-21 10:41:14 -08:00
Kevin Kim
1459943a75 more shiftcorrection bug fixes 2024-01-21 10:08:48 -08:00
Kevin Kim
3241802441 fixed bug in CORRSHIFTSZ param 2024-01-21 08:25:17 -08:00
David Harris
bb3a7850c4 Simplified floating-point parameters in config-shared 2024-01-15 17:48:41 -08:00
David Harris
da4eca4854 Tested Zfh support using unreleased version of risch-arch-test Zfh tests. Fixed two bugs in fmv to/from int. 2024-01-15 13:24:57 -08:00
David Harris
9eb6d9c8b8 Added Zicond support 2024-01-11 07:37:15 -08:00
Rose Thompson
5062a8c89c Added parameter for cache's SRAM length. 
Progress towards verilator support.
 2023-12-18 12:50:49 -06:00
David Harris
a77bea9954 Merge pull request #472 from ross144/main 
Merge Zicclsm into main branch and removes the FPGA config.  FPGA makefile now automatically creates the config when building
 2023-11-14 08:34:06 -08:00
Rose Thompson
95fc5f4a1c Towards removing the FPGA config file. 2023-11-13 17:20:26 -06:00
David Harris
571c7d3be4 Divider cleanup 2023-11-12 19:41:12 -08:00
David Harris
f437336540 Explained sqrt preshifting 2023-11-12 10:05:54 -08:00
David Harris
6ac83c776e Cleaned up number of bits in fdivsqrt 2023-11-11 15:50:06 -08:00
David Harris
2bf5143163 Bug fixes related to size of fpdivsqrt bit count and number of cycles 2023-11-11 05:58:53 -08:00
David Harris
448ced00c5 Fixed testbench-fp to reflect signal name changes 2023-11-11 04:05:34 -08:00
David Harris
d5ba8fc5e6 fdivsqrt parameter cleanup 2023-11-10 18:33:08 -08:00
David Harris
3cae2385ab Simplified out LOGRK parameter 2023-11-10 18:19:41 -08:00
Rose Thompson
b74bfbeefd Merge branch 'main' into Zicclsm 2023-11-10 16:15:32 -06:00
David Harris
953c53d065 fdivsqrt parameter cleanup 2023-11-10 09:11:15 -08:00
David Harris
4c106215f4 Started cleaning up shifting leading 1 in fdivsqrt 2023-11-10 08:46:55 -08:00
Rose Thompson
0a4ed5515b Merge branch 'main' into Zicclsm 2023-11-02 12:55:51 -05:00
naichewa
7dd3f24d6c Merge branch 'main' into spi 2023-10-30 17:01:41 -07:00
David Harris
f6a7f707bd Fixed test cases for medeleg issue 444. Also added a COMPRESSED_SUPPORTED parameter true when C or Zca is supported, and use this to get compressed hardware such as the spill logic and the +2 adder. 2023-10-30 09:56:17 -07:00
Rose Thompson
657409aec5 Addec ZICCLSM to config files and started on lsu instance. 2023-10-27 13:07:23 -05:00
naichewa
d5d4f9d044 transferred spi changes in ECA-authorized commit 2023-10-12 13:36:57 -07:00
David Harris
28752303be Added ZCA/ZCF/ZCD/ZCB support. Doesn't break regression, but not tested. Need to get tests for Zcb. Draft tests are in riscv-arch-test but not yet committed there 2023-10-04 12:28:12 -07:00
Ross Thompson
f863cbf366 Actually fixed non-power of 2 issue with RAS. 
Added RAS swapping to branch predictor scripts and configurations.
 2023-09-27 12:25:05 -05:00
Kevin Kim
dabd15e029 synth works 2023-08-26 21:11:21 -07:00
David Harris
c6631ef808 Added N and PBMT bits to MMU PTE 2023-08-24 19:44:46 -07:00
David Harris
d58ece3d44 renamed test-shared.vh to config-shared.vh 2023-07-30 05:22:39 -07:00
Ross Thompson
b1f7a5768f Removed all old references to the old flash card controller. 
Added git submodule for the flash card in addins.
Replicated flash card top level for our changes into the fpga/src directory.
 2023-07-24 15:45:57 -05:00
Ross Thompson
a89a1e675c Merge branch 'boot' into mergeBoot 
Merges Jacob's new sdc controller into wally.
 2023-07-21 17:43:45 -05:00
Ross Thompson
e4d6a9f8c6 Removed all old configuration files. 2023-07-19 10:28:54 -05:00
Ross Thompson
af0e33209f Removed QEMU from configurations. 2023-07-19 10:23:55 -05:00
Ross Thompson
b756b248b4 Wow. The newest version of Vivado does not like the enums as parameters. 
The solution is simple.  I changed the type to logic [31:0] and defined macros for the branch predictor types as 32 bit integers.
 2023-07-18 15:07:10 -05:00
David Harris
644afa16cd Clean up privilege rs1 decoding and implement svinval as sfence.vma 2023-07-13 02:41:17 -07:00
Ross Thompson
cb22463763 Fixed slight bug in config from parameterization. 2023-07-07 16:33:34 -05:00
Ross Thompson
d2219023c3 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-06-15 14:57:23 -05:00
David Harris
b70b0c7c5e Added support for menvcfg and senvcfg, including menvcfg.STCE for supervisor timer compare 2023-06-09 14:40:01 -07:00
David Harris
6a0d818d74 Other Wally cleanup 2023-06-09 09:37:09 -07:00
Ross Thompson
1ceea51d8b Changes required to make verilator compile wally's testbench to c++. Not actually tested in simulation yet. 2023-05-31 16:51:00 -05:00
Ross Thompson
a963f0af3a Updated source code to be compatible with verilator 5.011 for lint only. 2023-05-31 10:44:23 -05:00