Thomas Fleming
2c4682c4be
Connect tlb and icache properly
2021-04-15 14:48:39 -04:00
Teo Ene
cefc8ea22b
Temporary change to mmu/priority_encoder.sv
...
Necessary to get synth working
Original HDL is still there, just commented out
2021-04-15 13:37:12 -05:00
Katherine Parry
0bdd3efdd5
integraded the FMA into the FPU
2021-04-15 18:28:00 +00:00
Ross Thompson
534e3eaac8
Merge branch 'bpfixes' into main
2021-04-15 09:06:21 -05:00
Shreya Sanghai
75caa65df1
Cherry Pick merge of Shreya's localhistory predictor changes into main.
...
fixed minor bugs in localHistory
2021-04-15 09:04:36 -05:00
ShreyaSanghai
80fbd66113
added localHistoryPredictor
2021-04-15 08:58:22 -05:00
Shreya Sanghai
3696bf4f2c
fixed bugs in global history to read latest GHRE
...
Cherry pick Shreya's commits into main branch.
2021-04-15 08:55:22 -05:00
bbracker
76f50d7a69
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-04-15 09:06:03 -04:00
bbracker
da22308e60
csri lint improvement
2021-04-15 09:05:53 -04:00
David Harris
6e298962e9
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-04-14 23:41:23 -04:00
David Harris
5112e50d5b
Deleted extraneous exe2memfile.pl
2021-04-14 23:41:15 -04:00
Thomas Fleming
d281ecd067
Remove imem from testbenches
2021-04-14 20:20:34 -04:00
bbracker
ccff1e6c99
rv64 interrupt servicing
2021-04-14 10:19:42 -04:00
Noah Boorstin
3e0ed5a2b1
busybear: use (slightly) less terrible verilog
2021-04-14 00:18:44 -04:00
Noah Boorstin
18a4d5fc8d
busybear testbench updates
...
start speculative checking on CSR* satp, *
add some slight delays in some CSR checkings to make them deterministic
I realize this verilog is incredibly un-idiomatic. But I still don't
know of anything better. If you figure it out, please let me know
2021-04-14 00:00:27 -04:00
Thomas Fleming
bb2d433971
Fix mmu lint errors
2021-04-13 19:19:58 -04:00
Thomas Fleming
e164437fe8
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2021-04-13 17:56:56 -04:00
David Harris
76cd6f2491
Updated risdvOVPsimPlus with symlink
2021-04-13 17:53:16 -04:00
Thomas Fleming
cf992758fd
Update virutal memory tests
2021-04-13 17:17:08 -04:00
Thomas Fleming
a545dcb9ae
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2021-04-13 17:15:10 -04:00
Katherine Parry
e075dc2d13
Various bugs fixed in FMA
2021-04-13 18:27:13 +00:00
Thomas Fleming
ae888b5705
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
...
Conflicts:
wally-pipelined/src/ebu/pagetablewalker.sv
2021-04-13 13:42:03 -04:00
Thomas Fleming
f0c926cf68
Move InstrPageFault to fetch stage
2021-04-13 13:39:22 -04:00
Thomas Fleming
08a84048b6
Add lru algorithm to TLB
2021-04-13 13:37:24 -04:00
Teo Ene
5f4ff7eb45
Fixed synthesis log error caused by typo in synthesis script
2021-04-13 12:12:36 -05:00
Teo Ene
db8c804925
Changed default target synth frequency
2021-04-13 11:48:30 -05:00
Teo Ene
0bffac2c74
Various code syntax changes to bring HDL to a synthesizable level
2021-04-13 11:27:12 -05:00
Ross Thompson
cb52820249
Fixed minor bug in muldiv which corrects the lint error.
2021-04-09 10:56:31 -05:00
ushakya22
c8c2d63163
Latest IE tests with timer interupts
2021-04-08 17:53:39 -04:00
bbracker
0c85b1c201
integrated peripheral testing into existing workflow
2021-04-08 15:31:39 -04:00
bbracker
37bca569ff
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-04-08 14:28:25 -04:00
bbracker
c8c87bd0d8
merge testbench
2021-04-08 14:28:01 -04:00
Katherine Parry
6e4a22ec4b
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-04-08 18:06:51 +00:00
David Harris
5b262159cd
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-04-08 14:04:09 -04:00
David Harris
2a7dd37441
restored testbench-imperas.sv
2021-04-08 14:04:01 -04:00
Katherine Parry
21efd0cad9
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-04-08 18:03:57 +00:00
Katherine Parry
08f45eb076
fixed FPU lint warnings
2021-04-08 18:03:21 +00:00
Katherine Parry
ebf4915440
fixed FPU lint warnings
2021-04-08 17:55:25 +00:00
ushakya22
6dc982285c
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-04-08 13:55:23 -04:00
ushakya22
0dfeb76f10
Updates to WALLY-IE tests
2021-04-08 13:54:42 -04:00
David Harris
2203e64b65
merge conflict resolution
2021-04-08 13:53:56 -04:00
David Harris
aabebdb59f
fixed sim-wally-32ic
2021-04-08 13:40:16 -04:00
Noah Boorstin
5f1cd43033
try to remove git-lfs stuff
2021-04-08 13:23:11 -04:00
Domenico Ottolia
d6949b5b81
Update privileged testgen & helper script
2021-04-08 05:14:07 -04:00
Domenico Ottolia
1bdfac6a77
Cause an Illegal Instruction Exception when attempting to write readonly CSRs
2021-04-08 05:12:54 -04:00
Thomas Fleming
bd310a55af
Refactor TLB into multiple files
2021-04-08 03:24:10 -04:00
Thomas Fleming
b3795cef2e
Provide attribution link for priority encoder
2021-04-08 03:05:06 -04:00
Thomas Fleming
e807f5d771
Implement support for superpages
2021-04-08 02:44:59 -04:00
ushakya22
7888eacc3f
MIE privilege tests with working timer interupt
2021-04-07 04:09:09 -04:00
ushakya22
35fe36647e
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-04-07 04:06:54 -04:00
