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MIE privilege tests with working timer interupt
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ushakya22
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commit
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@ -2,6 +2,175 @@
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##################################
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# testgen-IE.py
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#
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# ushakya@hmc.edu 31 March 2021
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#
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# Generate directed and random test vectors for RISC-V Design Validation.
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##################################
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##################################
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# libraries
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##################################
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from datetime import datetime
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from random import randint
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from random import seed
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from random import getrandbits
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##################################
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# functions
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##################################
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def writeTrapHandlers(storecmd):
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global testnum
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reg1 = 30
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reg2 = 29
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reg3 = 28
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lines = "\n# Trap Handler: Timer Interupt\n"
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lines += "_timer_trap_handler:\n"
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lines += "li x" + str(reg1) + ", MASK_XLEN(0x2A)\n"
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lines += str(storecmd) + " x" + str(reg1) + ", " + str(wordsize*testnum) + "(x6)\n"
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lines += "la x" + str(reg2) + ", 0x2004000\n"
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lines += str(storecmd) + " x" + str(reg1) + ", 0(x" + str(reg2) + ")\n"
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lines += "csrrw x" + str(reg3) + ", mepc, x0\n"
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lines += "addi x"+ str(reg3) + ", x" + str(reg3) + ", MASK_XLEN(0x4)\n"
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lines += "mret\n"
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f.write(lines)
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def writeVector(a, xlen, storecmd):
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global testnum
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[reg1, reg2, reg3] = [1, 2, 3]
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[reg5, reg8] = [5, 8]
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[reg9, reg10, reg11, reg12] = [9, 10, 11, 12]
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lines = "\n# Testcase 0: Timer Interupt\n"
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# Page 6 of unpriviledged spec
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# For both CSRRS and CSRRC, if rs1=x0, then the instruction will not write to the CSR at all, and so shall not cause any of the side effects
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# mcause code
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b = 1 << (xlen-1)
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b = b + 0x7
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expected = b
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lines = lines + "li x" + str(reg1) + ", MASK_XLEN(" + formatstr.format(b) + ")\n"
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if (testnum == 0): expected = 0
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# set interupt enable bit in mstatus
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lines += "li x" + str(reg3) + ", MASK_XLEN(0x8)\n"
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lines += "csrrs x0, mstatus, x" + str(reg3) + "\n"
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# set machine timer interupt enable bit in mie
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lines += "li x" + str(reg9) + ", MASK_XLEN(0x80)\n"
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lines += "csrrs x0, mie, x" + str(reg3) + "\n"
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# Save and set trap handler address for machine mode timer interrupt
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lines += "la x" + str(reg5) + ", _timer_trap_handler\n"
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# save orignal mtvec address
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lines += "csrrw x" + str(reg12) + ", mtvec, x" + str(reg5) + "\n"
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# cause timer interupt
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#if (testnum == 0):
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lines += "li x" + str(reg8) + ", MASK_XLEN(0)\n"
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lines += str(storecmd) + " x" + str(reg8) + ", " + str(wordsize*testnum)+ "(x6)\n"
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lines += "la x" + str(reg8) + ", 0x2004000\n"
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lines += "li x" + str(reg3) + ", MASK_XLEN(0)\n"
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# save old value of mtimecmp and then set mtimecmp to zero
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lines += "lw x" + str(reg11) + ", 0(x" + str(reg8) + ")\n"
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lines += str(storecmd) + " x" + str(reg3) + ", 0(x" + str(reg8) + ")\n"
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#lines += "wfi\n" # wait for interupt to be taken
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lines += "nop\nnop\n"
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lines += "csrrw " + " x" + str(reg2) + ", mcause, x" + str(reg1) + "\n"
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# reset mtvec
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lines += "csrrw x0, mtvec, x" + str(reg12) + "\n"
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lines += storecmd + " x" + str(reg2) + ", " + str(wordsize*testnum) + "(x6)\n"
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lines += "RVTEST_IO_ASSERT_GPR_EQ(x7, x" + str(reg2) +", "+formatstr.format(expected)+")\n"
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f.write(lines)
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if (xlen == 32):
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line = formatrefstr.format(expected)+"\n"
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else:
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line = formatrefstr.format(expected % 2**32)+"\n" + formatrefstr.format(expected >> 32) + "\n"
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r.write(line)
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testnum = testnum+1
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##################################
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# main body
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##################################
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# change these to suite your tests
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tests = ["timer"]
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author = "ushakya@hmc.edu"
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xlens = [64, 32]
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numrand = 100;
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# setup
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seed(0) # make tests reproducible
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# generate files for each test
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for xlen in xlens:
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formatstrlen = str(int(xlen/4))
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formatstr = "0x{:0" + formatstrlen + "x}" # format as xlen-bit hexadecimal number
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formatrefstr = "{:08x}" # format as xlen-bit hexadecimal number with no leading 0x
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if (xlen == 32):
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storecmd = "sw"
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wordsize = 4
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else:
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storecmd = "sd"
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wordsize = 8
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for test in tests:
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imperaspath = "../../../imperas-riscv-tests/riscv-test-suite/rv" + str(xlen) + "p/"
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basename = "WALLY-IE"
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fname = imperaspath + "src/" + basename + ".S"
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refname = imperaspath + "references/" + basename + ".reference_output"
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testnum = 0
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# print custom header part
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f = open(fname, "w")
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r = open(refname, "w")
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line = "///////////////////////////////////////////\n"
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f.write(line)
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lines="// "+fname+ "\n// " + author + "\n"
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f.write(lines)
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line ="// Created " + str(datetime.now())
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f.write(line)
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# insert generic header
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h = open("../testgen_header.S", "r")
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for line in h:
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f.write(line)
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# print directed and random test vectors
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for i in range(0,numrand):
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a = getrandbits(xlen)
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b = getrandbits(xlen)
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writeVector(a, xlen, storecmd)
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writeTrapHandlers(storecmd)
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# print footer
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h = open("../testgen_footer.S", "r")
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for line in h:
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f.write(line)
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# Finish
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lines = ".fill " + str(testnum) + ", " + str(wordsize) + ", -1\n"
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lines = lines + "\nRV_COMPLIANCE_DATA_END\n"
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f.write(lines)
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f.close()
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r.close()
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"""
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#!/usr/bin/python3
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##################################
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# testgen-IE.py
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#
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# ushakya@hmc.edu 24 Mar 2021
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#
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# Generate tests for mie CSR for RISC-V Design Validation.
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@ -34,23 +203,23 @@ def writeVectors(storecmd):
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reg1, reg2, reg3 = randRegs()
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# Set interupt enable bit in mstatus
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lines = """
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lines = ""
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li x2, 0x8
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csrrs x3, mstatus, x2
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"""
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""
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f.write(lines)
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# Save and set trap handler address for machine mode timer interrupt
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lines += """
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lines += ""
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la x1, _timer_trap_handler
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csrrw x31, mtvec, x1
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"""
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""
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f.write(lines)
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# Machine Mode Timer Interrupt (when interupt is enabled)
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# is this not working because mtimecmp isn't implemented????
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write(f"""
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write(f""
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li x2, 0x0
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li x4, 0x80
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@ -64,7 +233,7 @@ def writeVectors(storecmd):
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lw x5, 0(x2)
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sd x3, 0(x2)
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wfi
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""", storecmd, True, 4, "m")
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"", storecmd, True, 4, "m")
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# Supervisor Timer Interrupt
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# user timer interupt
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@ -75,14 +244,14 @@ def writeVectors(storecmd):
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# Supervisor external interrupt True, 9
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# Save and set trap handler address for machine mode software interrupt
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# lines = """
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# lines = ""
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# la x1, _interupt_trap_handler
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# csrrw x31, mtvec, x1
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# """
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# ""
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# f.write(lines)
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# Machine Mode software interupt (write to the CLINT)
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#write(f"""
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#write(f""
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# li x6, 0x0
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#
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# li x4, 0x8
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@ -92,23 +261,23 @@ def writeVectors(storecmd):
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# lw x4, clint
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# or x3, x4, x3
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# {storecmd} x3, clint
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# """, storecmd, True, 3, "m")
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# "", storecmd, True, 3, "m")
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# supervisor mode software interupt
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# user mode software interupt
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# timer interupt trap handler
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lines = f"""
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lines = f""
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_timer_trap_handler:
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li x2, 0x2A
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{storecmd} x2, {str(wordsize*testnum)}(x6)
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la x3, 0x2004000
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{storecmd} x2, 0(x3)
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mret
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"""
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""
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# software interupt trap handler
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#lines += f"""
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#lines += f""
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#_interupt_trap_handler:
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#li x6, 0x2A
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#li x3, 0x0
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@ -116,8 +285,8 @@ def writeVectors(storecmd):
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#xor x3, x4, x3
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#{storecmd} x3, 0(clint)
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#mret
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#"""
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lines += storecmd + " x" + str(reg3) + ", " + str(wordsize*testnum) + "(x6)\n"
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#""
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lines += storecmd + " x" + str(reg3) + ", " + str(wordsize*testnum) + "(x6)"
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f.write(lines)
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@ -129,14 +298,14 @@ def write(lines, storecmd, interrupt, code, mode = "m"):
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#(0 if not interrupt else (2**31 if xlen == 32 else 2**63)) + code
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# go back and fix expected
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lines = f"""
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lines = f""
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# Testcase {testnum}
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li x31, 0
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{lines}
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{storecmd} x31, {str(wordsize*testnum)}(x6)
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# RVTEST_IO_ASSERT_GPR_EQ(x0, 0, {formatstr.format(expected)})
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"""
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""
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#if mode == "s":
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# go to supervisor mode
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@ -146,9 +315,9 @@ def write(lines, storecmd, interrupt, code, mode = "m"):
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f.write(lines)
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if (xlen == 32):
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line = formatrefstr.format(expected)+"\n"
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line = formatrefstr.format(expected)+""
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else:
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line = formatrefstr.format(expected % 2**32)+"\n" + formatrefstr.format(expected >> 32) + "\n"
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line = formatrefstr.format(expected % 2**32)+"" + formatrefstr.format(expected >> 32) + ""
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r.write(line)
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testnum = testnum+1
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@ -187,7 +356,7 @@ for xlen in xlens:
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storecmd = "sd"
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wordsize = 8
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imperaspath = f"""../../../imperas-riscv-tests/riscv-test-suite/rv{xlen}p/"""
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imperaspath = f"../../../imperas-riscv-tests/riscv-test-suite/rv{xlen}p/""
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basename = "WALLY-IE"
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fname = imperaspath + "src/" + basename + ".S"
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refname = imperaspath + "references/" + basename + ".reference_output"
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@ -196,9 +365,9 @@ for xlen in xlens:
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# print custom header part
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f = open(fname, "w")
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r = open(refname, "w")
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line = "///////////////////////////////////////////\n"
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line = "///////////////////////////////////////////"
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f.write(line)
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lines="// "+fname+ "\n// " + author + "\n"
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lines="// "+fname+ "// " + author + ""
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f.write(lines)
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line ="// Created " + str(datetime.now())
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f.write(line)
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@ -218,8 +387,9 @@ for xlen in xlens:
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f.write(line)
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# Finish
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lines = ".fill " + str(testnum) + ", " + str(wordsize) + ", -1\n"
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lines = lines + "\nRV_COMPLIANCE_DATA_END\n"
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lines = ".fill " + str(testnum) + ", " + str(wordsize) + ", -1"
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lines = lines + "RV_COMPLIANCE_DATA_END"
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f.write(lines)
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f.close()
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r.close()
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"""
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