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Author SHA1 Message Date
Ross Thompson
65d83b6f63 Merge branch 'main' of github.com:ross144/cvw 2023-03-28 14:47:16 -05:00
Ross Thompson
366a96a0fc Possible fix for issue 148. 
I found the problem. We use a Committed(F/M) signal to indicate the IFU or LSU has an ongoing cache or bus transaction and should not be interrupted. At the time of the mret, the IFU is fetching uncacheable invalid instructions asserting CommittedF. As the IFU finishes the request it unstalls the pipeline but continues to assert CommittedF. (This is not necessary for the IFU). In the same cycle the LSU d cache misses. Because CommittedF is blocking the interrupt the d cache submits a cache line fetch to the EBU.

I am thinking out loud here. At it's core the Committed(F/M) ensure memory operations are atomic and caches don't get into inconsistent states. Once the memory operation is completed the LSU/IFU removes the stall but continues to hold Committed(F/M) because the memory operation has completed and it would be wrong to allow an interrupt to occur with a completed load/store. However this is not true of the IFU. If we lower CommittedF once the operation is complete then this problem is solved. The interrupt won't be masked and the LSU will flush the d cache miss.

This requires a minor change in the cachebusfsm and cachefsm. I will report back after I've confirmed this works.
 2023-03-28 14:47:08 -05:00
Ross Thompson
514738ad96 Now reports i cache and d cache memory accesses. 2023-03-27 23:44:50 -05:00
Ross Thompson
3150d9244d Merge branch 'main' of github.com:ross144/cvw 2023-03-27 18:37:07 -05:00
Ross Thompson
059c73a4d2 First stab at the i cache logger. 2023-03-27 18:36:51 -05:00
Ross Thompson
4062038848 Added some additional details about the buildroot install. 2023-03-27 18:06:20 -05:00
Ross Thompson
67ddce4a6b Added buildroot instructions back to readme. moved these instructions to the docs directory. 2023-03-27 14:45:55 -05:00
Ross Thompson
d91188c86e Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-27 11:55:19 -05:00
Ross Thompson
9092dcb866 Merge pull request #165 from davidharrishmc/dev 
Imperas linux merge
 2023-03-27 11:54:30 -05:00
David Harris
9b7e5cec1f Removed unnecessary monitor 2023-03-27 09:52:38 -07:00
Ross Thompson
d9691c1542 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-27 10:22:48 -05:00
David Harris
a0504fd70c Commented out setting RISCV in run-imperas-linux.sh 2023-03-27 06:34:45 -07:00
David Harris
0ac4fd493a Merge pull request #164 from eroom1966/add-linux 
Add linux
 2023-03-27 06:26:41 -07:00
eroom1966
1a10e48ecf update to allow running of ImperasDV with linux boot 
optimize performance of the tracer
 2023-03-27 09:46:16 +01:00
Lee Moore
4bb7dadc00 Merge branch 'openhwgroup:main' into add-linux 2023-03-27 09:44:13 +01:00
Ross Thompson
1986ef0625 Started constrains file for arty a7 fpga. 2023-03-24 20:38:13 -05:00
Ross Thompson
ca4b058373 Modified plic and uart to remove async reset. This removes vivado critical warning. 2023-03-24 20:37:48 -05:00
Ross Thompson
576d37eb8c Updated fpga constraints to remove critical warning. 2023-03-24 19:09:36 -05:00
Ross Thompson
0afba56927 Updated GPIO signal names to reflect book. 2023-03-24 18:55:43 -05:00
Ross Thompson
af8f1fd036 Renamed controllerinputstage to controllerinput to match book. 2023-03-24 17:57:02 -05:00
Ross Thompson
6e3d4999a7 Merge pull request #162 from davidharrishmc/dev 
Merging spaces
 2023-03-24 17:49:26 -05:00
David Harris
0b0d954e7f Merged ross's spacing fixes 2023-03-24 15:47:26 -07:00
David Harris
092d34373f Merge pull request #159 from ross144/main 
Renamed signal to match book
 2023-03-24 15:34:59 -07:00
Ross Thompson
46b1bca4fc Fixed all tap/space issue in RTL. 2023-03-24 17:32:25 -05:00
Ross Thompson
b5a58502d0 Replaced tabs -> spaces cache. 2023-03-24 15:15:38 -05:00
Ross Thompson
b518177a45 Updated EBU to replace tabs with spaces. 2023-03-24 15:01:38 -05:00
David Harris
34cca979c6 Merge pull request #161 from kipmacsaigoren/bitmanip_muxchange 
Bit Manipulation Mux Changes
 2023-03-24 11:56:59 -07:00
Kevin Kim
b8349d480d Merge branch 'openhwgroup:main' into bitmanip_muxchange 2023-03-24 11:54:50 -07:00
Kevin Kim
b70ab0fa5a Zero/Sign extend mux in Shifter, Zero extend mux in Bitmanip alu 2023-03-24 11:52:51 -07:00
David Harris
4ee1f8150e Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-24 11:41:07 -07:00
David Harris
57e682ff10 Merge pull request #160 from kipmacsaigoren/priv-tests 
Fixed mideleg issue in privileged tests
 2023-03-24 11:40:35 -07:00
Kip Macsai-Goren
106ed02a7e Revert "added premilinary boundary ccrossing cases" 
This reverts commit 7870148814.
 2023-03-24 11:27:41 -07:00
Kip Macsai-Goren
74e0ece891 added working tests back into regression 2023-03-24 11:22:39 -07:00
Kip Macsai-Goren
758da62a9f ported fixes to 32 bit tests 2023-03-24 11:22:39 -07:00
Kip Macsai-Goren
ff59fefcc9 replaced inerrupt tests with allowed versions 2023-03-24 11:22:39 -07:00
Kip Macsai-Goren
6f15ae1225 Added cause_s_soft_from_m_interrupt 2023-03-24 11:22:39 -07:00
Kip Macsai-Goren
7870148814 added premilinary boundary ccrossing cases 2023-03-24 11:22:39 -07:00
David Harris
4b9b20bce0 Shifter capitalization 2023-03-24 09:01:07 -07:00
Ross Thompson
47f8e847f0 Renamed ebu signal. 2023-03-24 10:51:04 -05:00
Ross Thompson
6640e9956b Merge pull request #157 from davidharrishmc/dev 
Merged branch fix
 2023-03-24 10:49:45 -05:00
David Harris
89954df49b Query about CondExtA 2023-03-24 08:35:33 -07:00
David Harris
21424d0f86 Shifter sign simplification and capitalization 2023-03-24 08:27:30 -07:00
David Harris
cb261731f2 FPU detect illegal instructions 2023-03-24 08:12:32 -07:00
David Harris
f1e87c5e69 Start of EBU coverage tests 2023-03-24 08:12:02 -07:00
David Harris
2dda311df8 Avoid printing junk when running regression 2023-03-24 08:11:15 -07:00
David Harris
576545e328 ALUControl Elimination 2023-03-24 08:10:48 -07:00
David Harris
f648be8ee2 Merged ALUOp into ALUControl to simplify ALU mux 2023-03-24 07:28:42 -07:00
David Harris
89479391ca Simplified rotate source to shifter 2023-03-24 06:49:26 -07:00
David Harris
e8d6073eca BMU simplifications 2023-03-24 06:18:06 -07:00
David Harris
3bdb176253 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-24 05:59:48 -07:00