kipmacsaigoren
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24f0f34aff
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Merge branch 'openhwgroup:main' into priv-tests
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2023-03-07 13:46:55 -08:00 |
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David Harris
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e15058a721
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Merge pull request #130 from ross144/main
change signal names to match book.
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2023-03-07 09:38:35 -08:00 |
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Ross Thompson
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f067935eed
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Added Yujun Lin's branch predictor simulator. This is a C baseline module for common branch predictor algorithms.
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2023-03-07 10:49:59 -06:00 |
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Ross Thompson
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6d4e28fdf2
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-03-06 22:29:27 -06:00 |
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Ross Thompson
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610546f195
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Merge pull request #129 from davidharrishmc/dev
Further illegal instruction detection
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2023-03-06 22:29:11 -06:00 |
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Ross Thompson
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e448cd54ef
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-03-06 18:39:15 -06:00 |
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Ross Thompson
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a6b851a672
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Renamed signals to be consistent with textbook.
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2023-03-06 18:29:31 -06:00 |
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Ross Thompson
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31fcc0daf7
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Renamed PCFSpill to PCSpillF.
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2023-03-06 17:50:57 -06:00 |
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Ross Thompson
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473ed2b475
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Renamed InstrFirstHalf to InstrFirstHalfF.
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2023-03-06 17:48:57 -06:00 |
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Ross Thompson
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fdfb80a818
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Renamed ebuarbfsm to ebufsmarb to match figures.
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2023-03-06 17:47:55 -06:00 |
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David Harris
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7ecf4cdea8
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Fixed bug about rv64 shifts only using 6 bits of funct7
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2023-03-06 13:10:51 -08:00 |
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David Harris
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7e0c96cdcc
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Simplified decoder default to illegal instruction
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2023-03-06 11:21:11 -08:00 |
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David Harris
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c2efdbdbbb
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More detailed decoding of load/store/branch/jump
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2023-03-06 11:15:48 -08:00 |
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Ross Thompson
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be0318209e
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Updated fpga ila script.
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2023-03-06 13:14:48 -06:00 |
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Ross Thompson
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00647b4612
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Merge pull request #128 from davidharrishmc/dev
Detecting illegal instructions with controller
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2023-03-06 13:10:31 -06:00 |
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David Harris
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54f53ca843
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-03-06 11:02:48 -08:00 |
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David Harris
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a56557d847
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Improved decoding illegal instructions in controller
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2023-03-06 11:02:42 -08:00 |
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Ross Thompson
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7b1b65e860
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Working batch mode branch prediction simulations.
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2023-03-04 17:59:16 -06:00 |
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Kip Macsai-Goren
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db6caedfec
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added in the CSR name for stimecmp(h)
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2023-03-04 15:53:03 -08:00 |
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Kip Macsai-Goren
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ab6b953a4b
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removed changes to counteren from stimecmp tests
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2023-03-04 15:46:57 -08:00 |
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Kip Macsai-Goren
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75f6e9eb34
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added S time compare to gc configs
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2023-03-04 15:46:26 -08:00 |
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Ross Thompson
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6766ecc28e
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Mostly working bpred launch script.
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2023-03-04 17:20:45 -06:00 |
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Ross Thompson
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e9fa234410
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Partial automation of branch predictor embenching.
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2023-03-04 17:10:58 -06:00 |
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Kip Macsai-Goren
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a38f7cc8a1
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added reset values to stime and stimecmp registers
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2023-03-04 15:06:15 -08:00 |
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Kip Macsai-Goren
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ac5c53a870
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Added correct causing and handling of S time interrupts to test suite.
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2023-03-04 15:04:17 -08:00 |
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Ross Thompson
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93f2bacdae
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Updated parsing script.
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2023-03-04 13:45:15 -06:00 |
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David Harris
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3678ab556c
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Removed unneeded diagnostic print
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2023-03-03 16:46:16 -08:00 |
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Ross Thompson
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da74ed0369
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Merge pull request #126 from davidharrishmc/dev
ImperasDV setup
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2023-03-03 18:01:32 -06:00 |
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David Harris
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876c33da5f
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-03-03 15:54:42 -08:00 |
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David Harris
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a49f45f2f3
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Setup ImperasDV if available
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2023-03-03 15:54:35 -08:00 |
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Ross Thompson
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f07f331f72
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Removed debugging code.
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2023-03-03 17:52:00 -06:00 |
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Ross Thompson
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a3a45f696f
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Fixed a bunch of odd bugs with the test bench preventing correct measurement of performance counters.
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2023-03-03 17:49:44 -06:00 |
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David Harris
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d83edbf6d6
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Merge pull request #125 from ross144/main
Modified Performance Counter Data Collection
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2023-03-03 13:12:35 -08:00 |
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Ross Thompson
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b0a9499f86
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Oups included the wave file in the wally-batch.do script.
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2023-03-03 15:10:07 -06:00 |
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Ross Thompson
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486148b45d
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Fixed batch mode regression test to work with hpmc loggic.
Added logic to exclude the embench warmups from preformance counters.
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2023-03-03 14:59:20 -06:00 |
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Ross Thompson
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0ecd1ef681
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Setup the testbench to exclude the warmup from performance counter reports.
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2023-03-03 13:10:01 -06:00 |
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Ross Thompson
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e70492ea3f
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Added performance new counter prints to testbench.
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2023-03-03 10:42:52 -06:00 |
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David Harris
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27f669118d
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Merge pull request #124 from ross144/main
Added additional performance counters. Ch 5 is update todate with these changes.
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2023-03-03 06:15:49 -08:00 |
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Ross Thompson
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dc49c2612d
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-03-03 00:22:27 -06:00 |
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Ross Thompson
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0cb5369351
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Renamed BTB misprediction to BTA.
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2023-03-03 00:18:34 -06:00 |
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Ross Thompson
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5b5677ccb8
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Added divide cycle counter.
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2023-03-02 23:59:52 -06:00 |
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Ross Thompson
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aabb454d1c
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Added the i and d cache cycle counters.
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2023-03-02 23:54:56 -06:00 |
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Ross Thompson
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cfca77172e
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Added fence counter.
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2023-03-02 23:29:20 -06:00 |
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Ross Thompson
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f32f8c109a
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Added csr write counter, sfence vma counter, interrupt counter, and exception counter.
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2023-03-02 23:21:29 -06:00 |
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Ross Thompson
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a313b10912
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Added store stall to performance counters.
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2023-03-02 23:10:54 -06:00 |
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Ross Thompson
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2dd693a3b3
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Reordered performance counters and added space for new ones.
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2023-03-02 23:04:31 -06:00 |
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Ross Thompson
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724f2634c5
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Fixed bug in performance counter script.
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2023-03-02 22:32:13 -06:00 |
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Ross Thompson
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1f3639bff6
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Added support for branch target buffer stats.
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2023-03-02 22:16:30 -06:00 |
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David Harris
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316b8b2250
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Refactored Floating point division special case detection to avoid spurious trigger on Y for sqrt)
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2023-03-02 20:00:47 -08:00 |
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Ross Thompson
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9bd6851ed5
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Merge pull request #123 from eroom1966/main
fix the memory map privileges in the REF model view
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2023-03-02 09:27:35 -06:00 |
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