David Harris
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17cbdb53df
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Progress on Verilator simulation. Full adder compiles and runs. Wally builds.
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2023-12-31 09:53:13 -08:00 |
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David Harris
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7f31a031bc
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Temporarily removed zicboz and zcb tests from regression until they work
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2023-12-25 06:02:28 -08:00 |
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David Harris
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c1ad6602a3
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Added commented out B extension MISA to imperas.ic; not yet working
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2023-12-21 11:04:41 -08:00 |
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David Harris
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9ced88c55c
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Fixed tlbNAPOT test to run and makefile to gather coverage stats
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2023-12-20 21:45:14 -08:00 |
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David Harris
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8552369687
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Merged PR538, delete unused tests
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2023-12-20 13:30:31 -08:00 |
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David Harris
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4186b604e0
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Updated imperas.ic to throw misalignment faults on uncachable memory regions
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2023-12-19 12:53:21 -08:00 |
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Rose Thompson
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4f59bd492d
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-12-19 12:06:04 -06:00 |
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Rose Thompson
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74238defc3
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Progress.
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2023-12-18 20:23:19 -06:00 |
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David Harris
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38f4d9baf8
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Use riscv-arch-test arch32e instead of outdated wally-riscv-arch-test wally32e
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2023-12-15 05:05:53 -08:00 |
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David Harris
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29f57958a9
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Fixed WALLY-lrsc in ImperasDV by setting reservation set size to native word size and adjusting imperas.ic lr_sc_grain=8 to match
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2023-12-14 15:32:36 -08:00 |
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David Harris
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8eea2bdcc0
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Merge pull request #531 from ross144/main
Updated wavefile
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2023-12-14 14:52:31 -08:00 |
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Rose Thompson
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bb712d6860
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Updated wavefile.
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2023-12-14 14:36:23 -06:00 |
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Rose Thompson
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53bf68a585
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Merge pull request #528 from davidharrishmc/dev
Svnapot bug fix
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2023-12-13 21:30:47 -08:00 |
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David Harris
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68d49c37db
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Changed PMA settings in imperas.ic so that peripherals require aligned accesses. This fixes WALLY-trap in ImperasDV.
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2023-12-13 20:49:26 -08:00 |
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David Harris
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166c98b6f6
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Fixed issue 526 about WALLY-mmu-sv39-svadu-svnapot-svpbmt not checking ppn for NAPOT pages. Improved test case to check normal and malformed ppn
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2023-12-13 19:43:17 -08:00 |
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Rose Thompson
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9f4c32d49c
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Merge branch 'main' of github.com:ross144/cvw
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2023-12-13 20:32:59 -06:00 |
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Rose Thompson
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e089b421bb
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Got it working for the cache.
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2023-12-13 20:24:46 -06:00 |
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Rose Thompson
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f592baa741
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Closer.
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2023-12-13 18:15:32 -06:00 |
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Rose Thompson
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eeced05f33
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More progress towards store delay reduction.
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2023-12-13 15:56:29 -06:00 |
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Rose Thompson
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f3d43a7713
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Progress on reducing store stall in d cache.
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2023-12-13 15:34:21 -06:00 |
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David Harris
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6c017141c5
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Renamed HADE to ADUE for Svadu
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2023-12-13 11:49:04 -08:00 |
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Rose Thompson
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b2d640d245
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Merge branch 'main' of github.com:ross144/cvw
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2023-12-04 00:00:56 -06:00 |
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Rose Thompson
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8933aef357
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Reduced imperas linux run time to 10 seconds.
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2023-12-04 00:00:26 -06:00 |
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Rose Thompson
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d918791a60
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Fixed bug in the wally do script.
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2023-11-27 01:26:49 -06:00 |
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Rose Thompson
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35a7b2bd24
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Last little hickups out of the branch predictor results parsing.
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2023-11-27 00:35:22 -06:00 |
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Rose Thompson
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3dfca61c3f
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Changes to support concurrent simulation of all the branch predictor sweeps.
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2023-11-26 22:19:34 -06:00 |
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Rose Thompson
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d8f098013c
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Merge pull request #506 from davidharrishmc/dev
Cleanup
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2023-11-24 08:45:15 -08:00 |
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David Harris
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bcc20c6bd5
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Merge pull request #505 from stineje/main
Update fix for cvtint testbench-fp
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2023-11-23 20:43:00 -08:00 |
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David Harris
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3df4c13daa
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Updated wallyTracer for Linux boot and wally-batch.do to remove buildroot checkpoint support
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2023-11-23 20:36:45 -08:00 |
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James E. Stine
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1ab7522064
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Update fix for cvtint testbench-fp
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2023-11-23 17:56:51 -06:00 |
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David Harris
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d509644fa6
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merged pr
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2023-11-21 21:54:33 -08:00 |
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David Harris
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d1bb5c7512
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Imperas fix for satp modes supported
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2023-11-21 21:52:11 -08:00 |
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Rose Thompson
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8233ca999f
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Changed buildroot to run for 1M instructions only.
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2023-11-21 23:46:45 -06:00 |
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Rose Thompson
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2767c8b410
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Updated imperas.ic to support just sv48 and sv39.
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2023-11-21 23:24:16 -06:00 |
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David Harris
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6bec559ba6
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Removed stale signals from wave.do
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2023-11-21 19:49:14 -08:00 |
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Rose Thompson
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e5b7301ffe
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Updated imperad dv vendor id and architecture id config.
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2023-11-21 15:14:17 -06:00 |
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Rose Thompson
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b137759b45
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-11-20 10:34:36 -06:00 |
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Rose Thompson
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3594c08d4b
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Modified linux imperas tests to
1. enable zicclsm
2. enable logging at 7000 ms
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2023-11-20 10:30:35 -06:00 |
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David Harris
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70c58a8ce1
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Merge pull request #484 from ross144/main
Changed bpred-sim.py to only simulate 12 jobs at once.
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2023-11-17 13:26:24 -08:00 |
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Rose Thompson
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8cf2c404bf
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bpred-sim only simulates 12 jobs at once.
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2023-11-17 15:21:58 -06:00 |
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David Harris
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94201e993f
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Merge pull request #481 from ross144/main
Fixed the BTB logger so sim_bp correctly reports BTB performance
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2023-11-15 17:45:38 -08:00 |
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Rose Thompson
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9a90c15f37
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Extended SeparateBranch to support both just branches and all control flow instructions.
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2023-11-15 16:36:49 -06:00 |
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David Harris
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cfaeeae25a
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Added cmoz support to imperas.ic and adjusted imperas testbench to no longer need FPGA parameter
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2023-11-15 08:15:01 -08:00 |
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Rose Thompson
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feb45b9b59
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Patched up linux imperas testbench.
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2023-11-14 14:20:13 -06:00 |
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Rose Thompson
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fdb75203cb
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Added cbop to to rv32gc.
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2023-11-14 10:55:22 -06:00 |
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Rose Thompson
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95fc5f4a1c
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Towards removing the FPGA config file.
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2023-11-13 17:20:26 -06:00 |
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David Harris
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426aabbc1a
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Imperas commenting
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2023-11-10 08:26:32 -08:00 |
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David Harris
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7e00581187
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Add Svadu support and SPI to imperas configuration
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2023-11-10 06:27:25 -08:00 |
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David Harris
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625652b9ca
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Reporting stall path in synthesis script, support Zcb in Imperas
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2023-11-09 06:59:29 -08:00 |
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David Harris
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2b183020d5
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Fixed bit manpulation on imperas config
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2023-11-06 14:11:01 -08:00 |
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