forked from Github_Repos/cvw
216 lines
11 KiB
Plaintext
216 lines
11 KiB
Plaintext
QuestaSim-64 qrun 2021.2_1 Utility 2021.05 May 15 2021
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Start time: 21:17:08 on Oct 09,2021
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qrun -simulate -snapshot wally
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# vsim -lib qrun.out/work -c -do "run -all; quit -f" -statslog qrun.out/stats_log wally -appendlog -l qrun.log
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# Start time: 21:17:09 on Oct 09,2021
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# // Questa Sim-64
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# // Version 2021.2_1 linux_x86_64 May 15 2021
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# //
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# // Copyright 1991-2021 Mentor Graphics Corporation
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# // All Rights Reserved.
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# //
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# // QuestaSim and its associated documentation contain trade
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# // secrets and commercial or financial information that are the property of
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# // Mentor Graphics Corporation and are privileged, confidential,
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# // and exempt from disclosure under the Freedom of Information Act,
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# // 5 U.S.C. Section 552. Furthermore, this information
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# // is prohibited from disclosure under the Trade Secrets Act,
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# // 18 U.S.C. Section 1905.
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# //
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# Loading sv_std.std
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# Loading work.cla_sub52(fast)
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# Loading work.convert_inputs(fast)
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# Loading work.convert_inputs_div(fast)
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# Loading work.decoder(fast)
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# Loading work.faddcvt(fast)
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# Loading work.floprc(fast)
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# Loading work.fpudivsqrtrecur(fast)
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# Loading work.intdiv(fast)
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# Loading work.lz52(fast)
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# Loading work.qsel(fast)
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# Loading work.ahbliteState(fast)
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# Loading work.testbench_sv_unit(fast)
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# Loading work.testbench(fast)
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# Loading work.regfile(fast)
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# Loading work.csrn(fast)
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# Loading work.instrTrackerTB(fast)
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# Loading work.instrNameDecTB(fast)
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# Loading work.copyShadow(fast)
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# Loading work.tlbcamline(fast)
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# Loading work.pmpadrdec(fast)
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# Loading work.cacheway(fast)
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# Loading work.cacheway(fast__1)
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# run -all
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# ** Warning: Multiple Instruction Cache ways not yet implemented
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# Time: 0 ns Scope: testbench.riscvassertions File: ../testbench/testbench.sv Line: 327
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# ** Error: Some regression tests will fail if TIM_RANGE is less than 56'h07FFFFFF
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# Time: 0 ns Scope: testbench.riscvassertions File: ../testbench/testbench.sv Line: 330
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-ADD-01.elf.memfile
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# rv32i/I-ADD-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-ADDI-01.elf.memfile
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# rv32i/I-ADDI-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-AND-01.elf.memfile
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# rv32i/I-AND-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-ANDI-01.elf.memfile
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# rv32i/I-ANDI-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-AUIPC-01.elf.memfile
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# rv32i/I-AUIPC-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-BEQ-01.elf.memfile
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# rv32i/I-BEQ-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-BGE-01.elf.memfile
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# rv32i/I-BGE-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-BGEU-01.elf.memfile
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# rv32i/I-BGEU-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-BLT-01.elf.memfile
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# rv32i/I-BLT-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-BLTU-01.elf.memfile
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# rv32i/I-BLTU-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-BNE-01.elf.memfile
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# rv32i/I-BNE-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-DELAY_SLOTS-01.elf.memfile
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# rv32i/I-DELAY_SLOTS-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-EBREAK-01.elf.memfile
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# rv32i/I-EBREAK-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-ECALL-01.elf.memfile
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# rv32i/I-ECALL-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-ENDIANESS-01.elf.memfile
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# rv32i/I-ENDIANESS-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-IO-01.elf.memfile
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# rv32i/I-IO-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-JAL-01.elf.memfile
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# rv32i/I-JAL-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-JALR-01.elf.memfile
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# rv32i/I-JALR-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-LB-01.elf.memfile
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# 790020 Warning: access to memory address 0
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#
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# rv32i/I-LB-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-LBU-01.elf.memfile
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# rv32i/I-LBU-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-LH-01.elf.memfile
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# rv32i/I-LH-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-LHU-01.elf.memfile
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# rv32i/I-LHU-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-LUI-01.elf.memfile
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# rv32i/I-LUI-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-LW-01.elf.memfile
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# rv32i/I-LW-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-MISALIGN_LDST-01.elf.memfile
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# rv32i/I-MISALIGN_LDST-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-NOP-01.elf.memfile
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# rv32i/I-NOP-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-OR-01.elf.memfile
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# rv32i/I-OR-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-ORI-01.elf.memfile
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# rv32i/I-ORI-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-RF_size-01.elf.memfile
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# rv32i/I-RF_size-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-RF_width-01.elf.memfile
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# rv32i/I-RF_width-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-RF_x0-01.elf.memfile
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# rv32i/I-RF_x0-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-SB-01.elf.memfile
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# 1233020 Warning: access to memory address 0
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#
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# rv32i/I-SB-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-SH-01.elf.memfile
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# rv32i/I-SH-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-SLL-01.elf.memfile
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# rv32i/I-SLL-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-SLLI-01.elf.memfile
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# rv32i/I-SLLI-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-SLT-01.elf.memfile
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# rv32i/I-SLT-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-SLTI-01.elf.memfile
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# rv32i/I-SLTI-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-SLTIU-01.elf.memfile
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# rv32i/I-SLTIU-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-SLTU-01.elf.memfile
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# rv32i/I-SLTU-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-SRA-01.elf.memfile
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# rv32i/I-SRA-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-SRAI-01.elf.memfile
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# rv32i/I-SRAI-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-SRL-01.elf.memfile
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# rv32i/I-SRL-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-SRLI-01.elf.memfile
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# rv32i/I-SRLI-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-SUB-01.elf.memfile
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# rv32i/I-SUB-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-SW-01.elf.memfile
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# rv32i/I-SW-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-XOR-01.elf.memfile
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# rv32i/I-XOR-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/I-XORI-01.elf.memfile
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# rv32i/I-XORI-01 succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-ADD.elf.memfile
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# rv32i/WALLY-ADD succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-SUB.elf.memfile
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# rv32i/WALLY-SUB succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-ADDI.elf.memfile
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# rv32i/WALLY-ADDI succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-ANDI.elf.memfile
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# rv32i/WALLY-ANDI succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-ORI.elf.memfile
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# rv32i/WALLY-ORI succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-XORI.elf.memfile
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# rv32i/WALLY-XORI succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-SLTI.elf.memfile
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# rv32i/WALLY-SLTI succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-SLTIU.elf.memfile
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# rv32i/WALLY-SLTIU succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-SLLI.elf.memfile
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# rv32i/WALLY-SLLI succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-SRLI.elf.memfile
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# rv32i/WALLY-SRLI succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-SRAI.elf.memfile
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# rv32i/WALLY-SRAI succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-LOAD.elf.memfile
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# rv32i/WALLY-LOAD succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-SUB.elf.memfile
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# rv32i/WALLY-SUB succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-STORE.elf.memfile
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# rv32i/WALLY-STORE succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-JAL.elf.memfile
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# rv32i/WALLY-JAL succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-JALR.elf.memfile
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# rv32i/WALLY-JALR succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-BEQ.elf.memfile
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# 2846200 Warning: access to memory address 0
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#
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# rv32i/WALLY-BEQ succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-BNE.elf.memfile
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# rv32i/WALLY-BNE succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-BLTU.elf.memfile
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# rv32i/WALLY-BLTU succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-BLT.elf.memfile
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# rv32i/WALLY-BLT succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-BGE.elf.memfile
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# rv32i/WALLY-BGE succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-BGEU.elf.memfile
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# rv32i/WALLY-BGEU succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-CSRRW.elf.memfile
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# rv32i/WALLY-CSRRW succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-CSRRS.elf.memfile
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# rv32i/WALLY-CSRRS succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-CSRRC.elf.memfile
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# rv32i/WALLY-CSRRC succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-CSRRWI.elf.memfile
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# rv32i/WALLY-CSRRWI succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-CSRRSI.elf.memfile
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# rv32i/WALLY-CSRRSI succeeded. Brilliant!!!
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# Read memfile ../../imperas-riscv-tests/work/rv32i/WALLY-CSRRCI.elf.memfile
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# rv32i/WALLY-CSRRCI succeeded. Brilliant!!!
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# SUCCESS! All tests ran without failures.
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# ** Note: $stop : ../testbench/testbench.sv(244)
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# Time: 4170295 ns Iteration: 0 Instance: /testbench
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# Break at ../testbench/testbench.sv line 244
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# Stopped at ../testbench/testbench.sv line 244
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# quit -f
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# End time: 21:17:54 on Oct 09,2021, Elapsed time: 0:00:45
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# Errors: 1, Warnings: 1
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# *** Summary *********************************************
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# qrun: Errors: 0, Warnings: 0
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# vsim: Errors: 1, Warnings: 1
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# Totals: Errors: 1, Warnings: 1
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