cvw/fpga/generator
2023-04-17 14:54:10 -05:00
..
debug
bootrom.txt
insert_debug_comment.sh
Makefile Fixed more issues with arty a7 constarints. 2023-04-16 13:25:02 -05:00
probe
wally.tcl Adding in the ILA to the arty a7. 2023-04-17 14:54:10 -05:00
wave_config.wcfg
xlnx_ahblite_axi_bridge.tcl
xlnx_axi_clock_converter.tcl
xlnx_ddr3-artya7-mig.prj Finally got the arty a7 to build. 2023-04-17 11:54:22 -05:00
xlnx_ddr3-ArtyA7.tcl
xlnx_ddr4-vcu108.tcl
xlnx_ddr4-vcu118.tcl
xlnx_ddr4.tcl
xlnx_mmcm.tcl Lowered arty a7 clock frequency to 15Mhz to meet timing. can probalby go faster. 2023-04-17 12:16:31 -05:00
xlnx_proc_sys_reset.tcl