Ross Thompson c50a2bd8bf Changed CPUBusy to Stall in ebu modules.		2022-12-11 15:51:35 -06:00
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cache	Changed CPUBusy to Stall in ebu modules.	2022-12-11 15:51:35 -06:00
ebu	Changed CPUBusy to Stall in ebu modules.	2022-12-11 15:51:35 -06:00
fpu	Revert "Changed weird D sizing. Better names in preproc. Finalized Int/Float input to divider."	2022-12-04 00:01:58 +00:00
generic	Intermediate commit. Replaced flip flop dirty bit array with sram.	2022-11-30 00:08:31 -06:00
hazard	Renamed FPUStallD to FCvtIntStallD	2022-12-02 11:55:23 -08:00
ieu	Renamed FPUStallD to FCvtIntStallD	2022-12-02 11:55:23 -08:00
ifu	Changed CPUBusy to Stall in ebu modules.	2022-12-11 15:51:35 -06:00
lsu	Changed CPUBusy to Stall in ebu modules.	2022-12-11 15:51:35 -06:00
mmu	Moved CPUBusy out of HPTW.	2022-12-11 15:48:00 -06:00
muldiv	code cleanup	2022-12-01 08:15:48 -08:00
ppa	cleanup, plots for paper	2022-06-15 18:28:36 +00:00
privileged	Updated HPTW to route access faults generated by the HPTW to the original access type either instruction access fault, load access fault or store access fault.	2022-11-29 17:19:31 -06:00
uncore	Fixed the uart transmit fifo overrun bug.	2022-10-26 14:48:09 -05:00
wally	Renamed FPUStallD to FCvtIntStallD	2022-12-02 11:55:23 -08:00
sdc	piplined directory cleanup	2022-01-07 12:43:50 +00:00