Ross Thompson 7f38056879 fixed subtle typo in icache fsm. Was messing up hit spill hit. ... I believe the mibench qsort benchmark runs after this icache fix.		2021-05-03 16:55:36 -05:00
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buildroot	Added the ability to exclude branch predictor.	2021-04-26 14:27:42 -05:00
busybear	Added the ability to exclude branch predictor.	2021-04-26 14:27:42 -05:00
coremark	Added the ability to exclude branch predictor.	2021-04-26 14:27:42 -05:00
coremark_bare	Added the ability to exclude branch predictor.	2021-04-26 14:27:42 -05:00
rv32ic	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2021-04-30 06:26:35 -04:00
rv64BP	fixed subtle typo in icache fsm. Was messing up hit spill hit.	2021-05-03 16:55:36 -05:00
rv64ic	Fixed memory size in configs for rv32ic and rv64ic.	2021-04-29 17:36:46 -05:00
rv64icfd	Added the ability to exclude branch predictor.	2021-04-26 14:27:42 -05:00
rv64imc	Added the ability to exclude branch predictor.	2021-04-26 14:27:42 -05:00