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adder.sv
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fpu imperas tests run
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2021-05-01 02:18:01 +00:00 |
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bk15.sv
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fpu imperas tests run
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2021-05-01 02:18:01 +00:00 |
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black_gray_cells.sv
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Added missing files in FPU
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2021-04-04 18:09:13 +00:00 |
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cla12.sv
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fpu imperas tests run
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2021-05-01 02:18:01 +00:00 |
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cla52.sv
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fpu imperas tests run
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2021-05-01 02:18:01 +00:00 |
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cla64.sv
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fpu imperas tests run
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2021-05-01 02:18:01 +00:00 |
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convert_inputs_div.sv
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fdivsqrt inegrated, but not completley working
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2021-07-18 14:03:37 -04:00 |
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convert_inputs.sv
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Fixed writting MStatus FS bits
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2021-07-13 13:20:30 -04:00 |
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divconv.sv
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update part I on sbtm change
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2021-07-19 07:59:27 -05:00 |
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exception_div.sv
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Update fpdivsqrt item until move into uarch
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2021-07-13 16:53:20 -04:00 |
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exception.sv
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Added missing files in FPU
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2021-04-04 18:09:13 +00:00 |
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faddcvt.sv
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fpu unpacking unit created
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2021-07-14 17:56:49 -04:00 |
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fclassify.sv
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Simplified interface to fclassify and fsgn
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2021-07-22 12:30:46 -04:00 |
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fcmp.sv
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fpu unpacking unit created
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2021-07-14 17:56:49 -04:00 |
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fctrl.sv
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Fixed writting MStatus FS bits
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2021-07-13 13:20:30 -04:00 |
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fcvt.sv
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Partial work on Unpacking exponents to larger word size. FCVT and FMA are presently broken.
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2021-07-22 14:18:27 -04:00 |
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fdivsqrt.sv
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fdivsqrt inegrated, but not completley working
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2021-07-18 14:03:37 -04:00 |
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fhazard.sv
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fpu unpacking unit created
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2021-07-14 17:56:49 -04:00 |
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fma.sv
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Partial work on Unpacking exponents to larger word size. FCVT and FMA are presently broken.
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2021-07-22 14:18:27 -04:00 |
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fpadd_denorm.sv
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FPU update
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2021-07-02 12:40:58 -04:00 |
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fpdiv.sv
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FDIV and FSQRT passes when simulating in modelsim
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2021-07-18 23:00:04 -04:00 |
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fpu.sv
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Partial work on Unpacking exponents to larger word size. FCVT and FMA are presently broken.
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2021-07-22 14:18:27 -04:00 |
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fregfile.sv
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FPU update - missing files
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2021-07-02 12:53:05 -04:00 |
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fsgn.sv
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Simplified interface to fclassify and fsgn
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2021-07-22 12:30:46 -04:00 |
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fsm_div.v
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fdivsqrt inegrated, but not completley working
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2021-07-18 14:03:37 -04:00 |
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fsm.sv
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FDIV and FSQRT work
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2021-07-21 14:08:14 -04:00 |
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ldf64.sv
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fpu imperas tests run
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2021-05-01 02:18:01 +00:00 |
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ldf128.sv
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fpu imperas tests run
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2021-05-01 02:18:01 +00:00 |
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lzd_denorm.sv
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FPU update
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2021-07-02 12:40:58 -04:00 |
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mult_R4_64_64_cs.sv
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Commented out some unused modules
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2021-07-04 01:40:27 -04:00 |
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mult_R4_64_64_cs.v
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Update fpdivsqrt item until move into uarch
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2021-07-13 16:53:20 -04:00 |
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rounder_denorm.sv
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Fixed writting MStatus FS bits
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2021-07-13 13:20:30 -04:00 |
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rounder_div.sv
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fdivsqrt inegrated, but not completley working
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2021-07-18 14:03:37 -04:00 |
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sbtm_a0.sv
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Update fpdivsqrt item until move into uarch
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2021-07-13 16:53:20 -04:00 |
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sbtm_a1.sv
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Update fpdivsqrt item until move into uarch
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2021-07-13 16:53:20 -04:00 |
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sbtm_a2.sv
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FDIV and FSQRT passes when simulating in modelsim
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2021-07-18 23:00:04 -04:00 |
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sbtm_a3.sv
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Added missing files in FPU
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2021-04-04 18:09:13 +00:00 |
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sbtm_div.sv
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update part I on sbtm change
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2021-07-19 07:59:27 -05:00 |
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sbtm_sqrt.sv
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update part I on sbtm change
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2021-07-19 07:59:27 -05:00 |
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shifter_denorm.sv
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Commented out some unused modules
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2021-07-04 01:40:27 -04:00 |
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unpacking.sv
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Partial work on Unpacking exponents to larger word size. FCVT and FMA are presently broken.
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2021-07-22 14:18:27 -04:00 |
