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  • 29e68a82b2
         Merge pull request #236 from stineje/main Ross Thompson 2023-04-12 17:40:04 -0500
  • 4503ad4c87 Add simple example based on original C program built by David Harris for OSU who want to see easy way to convert FP numbers James E. Stine 2023-04-12 17:20:11 -0500
  • 800f0245f3 Cachefsm gate LRUWriteEn with ~FlushStage Alec Vercruysse 2023-04-12 13:32:36 -0700
  • e2520c8a27 fctrl coverage at 100% after removing redundancies from conditional statements Sydeny 2023-04-12 13:07:30 -0700
  • dee4d49e42 Modification to testfloat.do to accept argument for nowave or by default none James E. Stine 2023-04-12 14:49:40 -0500
  • f54868f19d
         Merge pull request #229 from davidharrishmc/dev Ross Thompson 2023-04-12 12:21:03 -0500
  • e303d99d5b Merge branch 'main' into coverage3 Alec Vercruysse 2023-04-12 09:34:09 -0700
  • 44023e7ee7 Removed unnecessary start term from initialization muxes to simplify and improve coverage David Harris 2023-04-12 03:34:01 -0700
  • a433b8a1c1
         Merge pull request #234 from AlecVercruysse/cachesim David Harris 2023-04-12 03:14:03 -0700
  • e6269b364f Minor comments. Limnanthes Serafini 2023-04-12 02:57:42 -0700
  • 3b6e397172 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev David Harris 2023-04-12 02:57:33 -0700
  • 978b475269 Added performance and distribution to sim and wrapper. Added colors too! Limnanthes Serafini 2023-04-12 02:54:05 -0700
  • 28c02a7e6a Fixed fdivsqrt to avoid going from done to busy without going through idle first David Harris 2023-04-12 02:48:40 -0700
  • c5e3b5c68d Swapped in svadu mmu tests David Harris 2023-04-12 02:06:52 -0700
  • e0d27ff5a0
         Merge branch 'openhwgroup:main' into cachesim Limnanthes Serafini 2023-04-12 01:34:45 -0700
  • d60e3aaf53 only assign ClearDirtyWay for read-write caches Alec Vercruysse 2023-04-12 00:53:22 -0700
  • 729f81a0df refactor cachefsm to get full coverage Alec Vercruysse 2023-04-12 00:48:06 -0700
  • 1ce2ab5daa Coverage and readability improvements to LRUUpdate logic Alec Vercruysse 2023-04-11 23:05:56 -0700
  • 214abc7006 Make AdrSelMux and CacheBusAdrMux mux2 if READ_ONLY_CACHE Alec Vercruysse 2023-04-11 23:05:04 -0700
  • 6dce58125b Remove FlushStage Logic from CacheLRU Alec Vercruysse 2023-04-11 17:10:09 -0700
  • 3fc6bb0c40 Exclude (FlushStage & SetValidWay) condition for RO caches Alec Vercruysse 2023-04-11 16:59:11 -0700
  • 2f6ed64e26
         Merge pull request #232 from stineje/main Ross Thompson 2023-04-11 23:22:59 -0500
  • 5d1ad53bc7 Add feature in testfloat.do to elect wave or nowave James Stine 2023-04-11 22:35:04 -0500
  • f5201da676 Update testbench-fp to run TestFloat for all FP operations James Stine 2023-04-11 22:16:20 -0500
  • 11a5b23bb8 Logger significantly improved. Limnanthes Serafini 2023-04-11 19:29:51 -0700
  • fdb81e44c9 Minor logic cleanup (will elaborate in PR) Limnanthes Serafini 2023-04-11 19:29:39 -0700
  • 3f7f3d6a42 Wrapper for running CacheSim on the rv64gc suites Limnanthes Serafini 2023-04-11 19:29:05 -0700
  • b6ecd15eff Cleanup + success message added to CacheSim Limnanthes Serafini 2023-04-11 19:28:28 -0700
  • 953518bcba Merge branch 'main' of https://github.com/openhwgroup/cvw into dev David Harris 2023-04-11 19:08:09 -0700
  • 32daa34680
         Merge pull request #231 from kipmacsaigoren/priv-tests David Harris 2023-04-11 19:07:13 -0700
  • 9f30414e97 restored original virt mem tests when svadu is not supported Kip Macsai-Goren 2023-04-11 18:47:08 -0700
  • 7d9ebf56ed renamed virt mem tests to include svadu Kip Macsai-Goren 2023-04-11 18:46:37 -0700
  • cf50d04a21 removed unnecessary 'deadbeef's at the end of reference outputs Kip Macsai-Goren 2023-04-11 18:32:04 -0700
  • b839de4451 Modified virt mem tests to do correct r/w when svadu is enabled Kip Macsai-Goren 2023-04-11 18:08:30 -0700
  • 599ebc572e enabled SVADU for rv32/64gc Kip Macsai-Goren 2023-04-11 17:42:26 -0700
  • c179d76542 Removed Trap outputs from writes covered by SVADU Kip Macsai-Goren 2023-04-11 17:41:57 -0700
  • 41ef59ddfe Removed Sail from virt mem tests due to sail not recognizing SVADU Kip Macsai-Goren 2023-04-11 17:41:31 -0700
  • 4bf2a7e15b Added sail simulation to priv tests that support it Kip Macsai-Goren 2023-04-11 13:26:59 -0700
  • 1861ca8c86 Fixed more bugs in the ila debug constraints. Ross Thompson 2023-04-11 14:32:53 -0500
  • 0a43c43b0a Merge branch 'main' of github.com:ross144/cvw Ross Thompson 2023-04-11 14:31:08 -0500
  • b015e736a0 Updated to help debut Jacob's crossbar woes. Ross Thompson 2023-04-11 14:22:42 -0500
  • c7104bebd3 Fixed sum bugs with arty a7 ila script. Ross Thompson 2023-04-11 10:00:06 -0500
  • 4797f6ca5e
         Merge pull request #230 from ACWright256/main David Harris 2023-04-11 05:21:09 -0700
  • 34fd402f23 Excluded coverage for misaligned instructions Alexa Wright 2023-04-10 23:18:25 -0700
  • a7ec77239f Merge branch 'main' of https://github.com/openhwgroup/cvw into main Noah Limpert 2023-04-10 19:01:32 -0700
  • 6123efd5b2 Updates for arty a7. Ross Thompson 2023-04-10 17:02:19 -0500
  • 2abd164d03 Fixed syntax errors in arty7 top level. Ross Thompson 2023-04-10 16:08:40 -0500
  • 81fb076e9e Added more support for Arty A7 board. Ross Thompson 2023-04-10 16:01:17 -0500
  • d2d528cf3c Finally building ddr3 xilinx ip from script. Ross Thompson 2023-04-10 14:36:33 -0500
  • 5aa614858f Started putting together the arty a7 board package files. Ross Thompson 2023-04-10 13:15:55 -0500
  • baef1249e7 Turned on SVADU_SUPPORTED in rv32/64gc wally-config and in imperas.ic. ImperasDV is happy with these privileged tests now David Harris 2023-04-10 07:05:06 -0700
  • a819a24b83
         Merge pull request #226 from SydRiley/main David Harris 2023-04-09 21:52:11 -0700
  • df96732683
         Merge pull request #223 from ross144/main David Harris 2023-04-09 20:30:26 -0700
  • 2e97aa46db
         Merge pull request #224 from kbox13/my-single-change David Harris 2023-04-09 20:29:03 -0700
  • f74bb8b38e Create new pmp tests configures all pmpcfg registers in each different address range. Kevin Box 2023-04-09 16:29:57 -0700
  • 06a138e6d9 3rd attempt to resolve conflict in lsu.S file Noah Limpert 2023-04-09 15:52:18 -0700
  • ff405a49a5 Increasing coverage for the fpu by adding directed tests to toggle signals Sydeny 2023-04-09 13:33:12 -0700
  • d67ee33896 Updated wally figure again to increase resolution. Ross Thompson 2023-04-09 12:26:15 -0500
  • f6c84b1e8d Updated wally top level figure to fix issue 172. Ross Thompson 2023-04-09 12:20:43 -0500
  • 132016f131 Merge branch 'main' of https://github.com/openhwgroup/cvw into main Ross Thompson 2023-04-09 12:19:44 -0500
  • 11cadb3f8f
         Merge pull request #222 from kjprime/main David Harris 2023-04-09 04:56:21 -0700
  • c8cd2ffc77
         Merge pull request #221 from dherreravicioso/main David Harris 2023-04-09 04:54:36 -0700
  • 640310cf94 Merge branch 'main' of https://github.com/openhwgroup/cvw Kevin Thomas 2023-04-08 22:56:20 -0500
  • 76d5c3e500 Added test coverage for floating point registers, some PMP addresses, as well as MTVAL and MCAUSE CSRs. Diego Herrera Vicioso 2023-04-08 16:40:36 -0700
  • e79119e2fd
         Merge pull request #220 from davidharrishmc/dev Ross Thompson 2023-04-08 10:27:31 -0500
  • d27779f4c0 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev David Harris 2023-04-07 21:57:18 -0700
  • 4a2f641348 Waived coverage on BTB memory with byte write enables tied high David Harris 2023-04-07 21:56:49 -0700
  • 495f2ed274 Improved RAS predictor coverage by eliminating unreachable StallM term David Harris 2023-04-07 21:37:12 -0700
  • a36a8ef6f5
         Merge pull request #219 from davidharrishmc/dev Ross Thompson 2023-04-07 23:30:52 -0500
  • 5119222c2f Commented WFI non-flush in writeback stage of hazard unit David Harris 2023-04-07 21:27:13 -0700
  • a9b7bd101e Added vm64check tests to cover IMMU vm64 David Harris 2023-04-07 21:14:52 -0700
  • 25f394ce97 Fixed csrwrites.S to agree with ImperasDV. Now coverage tests pass iter-elf David Harris 2023-04-07 21:11:01 -0700
  • 5c6d9f87a0 Fixed priv.S to initialize stimecmp and agree with ImperasDV David Harris 2023-04-07 20:44:01 -0700
  • 7ad8d7f774 Bug fix: MTIME & MTIMEH registers are unimplemented and should fault when accessed David Harris 2023-04-07 20:43:28 -0700
  • 8b4016582b Fixed WALLY-init-lib to return correctly even from traps from compressed instructions David Harris 2023-04-07 20:24:33 -0700
  • 982ade31c5 Fixed enabling machine timer interrupt David Harris 2023-04-06 22:18:33 -0700
  • c9887cb182 vm64 tests David Harris 2023-04-06 21:42:47 -0700
  • c24e81c57f Division cleanup David Harris 2023-04-06 21:42:34 -0700
  • ce931d1fc5 Simplified integer division preprocessing in fdivsqrt David Harris 2023-04-06 16:43:28 -0700
  • f810ad3cec Merge branch 'main' of https://github.com/openhwgroup/cvw into dev David Harris 2023-04-06 14:07:59 -0700
  • 1569bfbb98 Removed redundant stall signal to get spill coverage David Harris 2023-04-06 14:07:50 -0700
  • 87a1d12c3b Merge branch 'main' of github.com:ross144/cvw Ross Thompson 2023-04-06 15:33:24 -0500
  • b57566e632 Added Jacob's ILA script. Ross Thompson 2023-04-06 15:32:36 -0500
  • fe922c8fac Fixed syntax error. Ross Thompson 2023-04-06 15:10:55 -0500
  • 270b3371f1 Added note about strange vivado behavior not inferring block ram. Ross Thompson 2023-04-06 15:09:35 -0500
  • d121364997 Similifed the no byte write enabled version of the sram model. Ross Thompson 2023-04-06 14:18:41 -0500
  • 1931859c45 Merge branch 'main' of https://github.com/openhwgroup/cvw Kevin Thomas 2023-04-06 12:38:41 -0500
  • fddbd79209
         Update dvtestplan.md David Harris 2023-04-06 09:29:47 -0700
  • 6431e358ca
         Create dvtestplan.md David Harris 2023-04-06 09:23:09 -0700
  • 4448c238c4
         Merge pull request #214 from eroom1966/main David Harris 2023-04-06 09:08:20 -0700
  • a20528e43c
         Merge branch 'openhwgroup:main' into main Lee Moore 2023-04-06 16:31:49 +0100
  • 430763a1d1 add support into configuration for Zb(a,b,c,s) eroom1966 2023-04-06 16:30:14 +0100
  • 2a3711546f
         Merge pull request #213 from eroom1966/main David Harris 2023-04-06 06:54:59 -0700
  • 319a1b9161 fix break to simulation testbench eroom1966 2023-04-06 14:45:41 +0100
  • 52dcd63d1e
         Merge pull request #211 from ross144/main David Harris 2023-04-05 21:50:32 -0700
  • 1478115faf Fixed wally64/32priv test hangup. The fix for the issue 203 had a lingering bug which did not suppress a bus access if the hptw short circuits on a pma/p fault. Ross Thompson 2023-04-05 23:13:45 -0500
  • 5d71960385 Merge branch 'main' of https://github.com/kjprime/cvw Kevin Thomas 2023-04-05 17:44:54 -0500
  • 0b317c4823
         Merge branch 'openhwgroup:main' into main Kevin Thomas 2023-04-05 17:44:47 -0500
  • e70a081924 Merge branch 'main' of https://github.com/openhwgroup/cvw Kevin Thomas 2023-04-05 17:43:43 -0500
  • f2c26ff886
         Merge pull request #206 from AlecVercruysse/coverage2 Ross Thompson 2023-04-05 17:29:35 -0500