Commit Graph

15 Commits

Author SHA1 Message Date
Noah Boorstin
e8132800d3 Start of gdb output parser
super simple rn, just getting instructions, will get registers soon
2021-01-22 13:57:58 -05:00
Noah Boorstin
8c85f891f5 add scripts for generating instruction trace 2021-01-22 13:06:45 -05:00
Noah Boorstin
40f0b1e328 More testbench setup work
- Copy bare-bones testbench from E85
   - have testbench instantiate a wallypipelinedhart so we can simulate memory/peripherals easier
 - Create .gitignore for vsim files
 - Make PC reset a macro, change to 0x1000 to conform to the bootloader

I don't know a good way to put the linux register trace file we're generating on git,
since its both nontrivial to make and way to big to keep in a git repo

for now it lives in /mnt/scratch/riscv_testbench/
2021-01-21 17:55:05 -05:00
Noah Boorstin
795359576b copy testbench to modify for busybear 2021-01-21 16:17:34 -05:00
David Harris
f32c70e866 testgen-ADD-SUB working and testbench simualtes with new vectors for rv32 and rv64 2021-01-20 01:04:28 -05:00
David Harris
e3a7fcb5f1 testgen-ADD-SUB initial untested 2021-01-19 22:58:56 -05:00
David Harris
5479342d00 Initial testgen checkin 2021-01-19 13:09:56 -05:00
David Harris
6595c7827f Changed to . notation for instantiation, cleaned up dmem 2021-01-18 20:16:53 -05:00
David Harris
46d02d3818 cleanup 2021-01-18 00:42:40 -05:00
David Harris
18fe5c7c93 Sped up exe2memfile.pl 2021-01-17 18:45:19 -05:00
David Harris
df4d79f8f8 Added exe2memfile.py 2021-01-16 15:09:06 -05:00
David Harris
bfc86182a0 Added GPIO 2021-01-15 00:25:56 -05:00
David Harris
821fb20746 Added GPIO 2021-01-15 00:19:31 -05:00
David Harris
fd01e27a48 Initial Checkin 2021-01-14 23:37:51 -05:00
davidharrishmc
a609876074
Initial commit 2021-01-14 20:16:47 -08:00