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Author SHA1 Message Date
Ross Thompson
0b66106925 More cachefsm cleanup. 2022-02-06 21:50:44 -06:00
Ross Thompson
dd6baa9ed4 started cachefsm cleanup. 2022-02-06 21:39:38 -06:00
Kip Macsai-Goren
ddc8883ea5 fixed verify step to work correctly with comments. clarified copy references without simulating 2022-02-06 19:48:23 +00:00
Kip Macsai-Goren
0eb280b314 added new tests to make and testbench 2022-02-06 19:47:22 +00:00
Kip Macsai-Goren
5d1a0f3402 clarified csr write test 2022-02-06 19:46:29 +00:00
Kip Macsai-Goren
5ddcb29129 added CSR permission tests 2022-02-06 19:45:58 +00:00
Kip Macsai-Goren
51355abc2d light cleanup 2022-02-06 02:05:59 +00:00
Kip Macsai-Goren
07c806b02e added comments to existing MMU tests 2022-02-06 02:05:59 +00:00
Kip Macsai-Goren
e0ed4c00fc added commenting in reference outputs that aren't simulated in spike 2022-02-06 02:05:59 +00:00
Kip Macsai-Goren
1a5111fb75 Allowed commenting in signature files 2022-02-06 02:05:59 +00:00
David Harris
9b55848ffc Added E tests to wally-riscv-arch-test rv32i_m/I and fixed cyclic path in rv32e configuration 2022-02-06 01:22:40 +00:00
bbracker
f67af23bf3 remove sporadic tabs from tests.vh so that it is now only spaces 2022-02-05 23:07:38 +00:00
bbracker
74ef58e20e remove rv32e from regression because it is broken; goes with previous commit 2022-02-05 23:05:21 +00:00
bbracker
71a0d96c8d Remove rv32e tests from rv32i_m Makefrag so that make XLEN=32 works 2022-02-05 21:34:50 +00:00
Ross Thompson
d21be9d998 Added config to allow using the save/restore or replay implementation to handle sram clocked read delay. 2022-02-04 23:49:07 -06:00
David Harris
0f7b8017d1 Modified regression to use proper rv32e test name, but rv32e_wally32e still isn't passing due to loop exceeding iteration limit 2022-02-05 05:35:51 +00:00
David Harris
a9d2386010 Merged buildroot do files into wally-pipelined do files, added work suffixes so buildroot regression won't fail due to file conflicts 2022-02-05 05:28:40 +00:00
David Harris
66b4834ef5 Modified wally-pipelined-batch.do to handle buildroot 2022-02-05 05:07:07 +00:00
Ross Thompson
ea84211ff9 Removed unused ports from caches and buses. 2022-02-04 22:52:51 -06:00
Ross Thompson
011ad09341 Cleanup. 2022-02-04 22:40:51 -06:00
Ross Thompson
4074f695e0 Moved the hwdata mux back into the busdp. 2022-02-04 22:39:13 -06:00
Ross Thompson
40eb055861 Merged together the two sub cache line read muxes. 
One mux was used for loads and the other for eviction.
 2022-02-04 22:30:04 -06:00
David Harris
72bc64ef28 Temporarily changed rv32e config to use TIM, but it still fails. Added rv32e tests. 2022-02-05 04:16:18 +00:00
Ross Thompson
290430cda8 Moved the sub cache line read logic to lsu/ifu. 2022-02-04 20:42:53 -06:00
Ross Thompson
725852362e Got separate module for the sub cache line read. 2022-02-04 20:23:09 -06:00
Ross Thompson
cdd599e340 Second optimization of save/restore. 2022-02-04 14:35:12 -06:00
Ross Thompson
459054900f Optimization of cache save/restore. 2022-02-04 14:21:04 -06:00
Ross Thompson
7c1f7e335c Working first cut of the cache changes moving the replay to a save/restore. 
The current implementation is too expensive costing (tag+linelen)*numway flip flops and muxes.
 2022-02-04 13:31:32 -06:00
David Harris
2c67f32b97 RV32e tests 2022-02-04 14:30:36 +00:00
James Stine
dae826bd75 Update synthesis script for overwrite during copy 2022-02-03 20:29:03 -06:00
David Harris
c3333150c3 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-02-04 01:56:36 +00:00
David Harris
fb041fe06a rv32e 2022-02-04 01:56:30 +00:00
James Stine
b96d0e7095 Update to 12T for synthesis 2022-02-03 19:42:03 -06:00
James Stine
60e19e3b67 Added the 12T submodule to the project. 2022-02-03 19:26:41 -06:00
David Harris
a7c4eb0399 Synth for 500 MHz 2022-02-04 01:06:13 +00:00
David Harris
f1c8f5dda4 ignore .sv files in synthDC/hdl 2022-02-04 00:57:13 +00:00
David Harris
ec552dff19 Adjusted synthesis to compile rv32e on 12T library 2022-02-04 00:45:16 +00:00
David Harris
c2ddb121a0 Added E tests to repo 2022-02-03 23:42:31 +00:00
David Harris
ef5af9b5fd renamed configs 2022-02-03 23:36:41 +00:00
David Harris
17277775e6 E tests 2022-02-03 22:55:55 +00:00
David Harris
ee3300bcd2 sram1rw cleanup 2022-02-03 18:03:22 +00:00
David Harris
97d31cec21 sram1rw cleanup 2022-02-03 17:50:23 +00:00
David Harris
f9dd79d3e3 cachereplacementpolicy cleanup 2022-02-03 17:19:14 +00:00
David Harris
034ff5462c cachereplacementpolicy cleanup 2022-02-03 17:18:48 +00:00
David Harris
65f3bf4e0a cacheway cleanup 2022-02-03 16:52:22 +00:00
David Harris
eef04eed84 cacheway cleanup 2022-02-03 16:33:01 +00:00
David Harris
4d09510af9 cacheway cleanup 2022-02-03 16:07:55 +00:00
David Harris
7f237220dd cacheway cleanup 2022-02-03 16:00:57 +00:00
David Harris
a6708ed887 cache cleanup 2022-02-03 15:36:11 +00:00
Ross Thompson
b642a19e12 Merge branch 'makefiles' into main 2022-02-03 08:33:50 -06:00