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Author SHA1 Message Date
DTowersM
a310ef4ded switched coremark to 10 iterations 2022-07-11 17:20:38 +00:00
David Harris
2bc8ff555b added comment about checking SRAM size 2022-07-10 12:48:51 +00:00
David Harris
9cb675b2e4 added comment about RAMs in cacheway 2022-07-10 12:47:34 +00:00
David Harris
ad92d0876e Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-10 03:18:30 +00:00
Madeleine Masser-Frye
0dc3c9462b improved command line synth functionality 2022-07-09 04:51:23 +00:00
Madeleine Masser-Frye
b196b6b504 explanations and modifications for general ppa use 2022-07-09 03:24:47 +00:00
Madeleine Masser-Frye
19db618b7f syntheses now write alib in their own directories 2022-07-09 02:40:41 +00:00
Madeleine Masser-Frye
853a3a5df1 remove outdated scripts 2022-07-08 22:52:53 +00:00
Madeleine Masser-Frye
8dbb45519e tweaks to run synth without error 2022-07-08 22:52:10 +00:00
Madeleine Masser-Frye
a84aa36530 cleaned up old commands and commented 2022-07-08 22:39:53 +00:00
Madeleine Masser-Frye
79b93e776e condensed cleanup, changed bpred_size to 4, moved synth hdl into own directory 2022-07-08 22:29:18 +00:00
Madeleine Masser-Frye
8432c6331c told dc to look in synth directory for hdl and WORK 2022-07-08 22:16:34 +00:00
David Harris
64dd4f1644 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-08 22:00:53 +00:00
David Harris
8c9f483133 CoreMark makefile and printing improvements 2022-07-08 22:00:50 +00:00
cturek
2dc074ea93 F Selection 2022-07-08 21:53:52 +00:00
DTowersM
3e19500fc8 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into HEAD 2022-07-08 21:25:58 +00:00
DTowersM
f36b31a78b added PORT_CFLAGS and some WIP 32bit support 2022-07-08 21:25:52 +00:00
Madeleine Masser-Frye
27ec022df9 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-08 20:42:04 +00:00
Madeleine Masser-Frye
56f002b707 made parallel synthesis in python command line based 2022-07-08 20:41:59 +00:00
Katherine Parry
3476579e02 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-07-08 12:30:50 -07:00
Katherine Parry
9ef45f36fd renamed signals in cvt and prostproc 2022-07-08 12:30:43 -07:00
James Stine
c5dfefe669 Update SRAM to /proj/wally 2022-07-08 08:09:55 -05:00
slmnemo
43549b10fb Fixed error in gpio test 2022-07-08 02:27:16 -07:00
David Harris
d10ad0e883 Removed testbench code that ignores mismatch on zero signatures 2022-07-08 09:17:31 +00:00
David Harris
c72e4d43d2 erge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-08 09:09:07 +00:00
David Harris
381f3298d8 Moved HWSTRB to ahblite, factored out of peripherals. Moved old AHB peripherals to unusedsrc 2022-07-08 09:09:02 +00:00
David Harris
1ce0975366 Adjusting byte writes to RAM 2022-07-08 08:45:21 +00:00
David Harris
3f9e662201 Removed subwordwrite mention in cache because sww is needed to replicate data across byte enables 2022-07-08 08:44:37 +00:00
David Harris
9b6d9666c5 Removed unused swbytemask from CLINT 2022-07-08 08:43:24 +00:00
Madeleine Masser-Frye
023b31a4d2 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-08 08:02:19 +00:00
Madeleine Masser-Frye
8f0f626140 made wally synth flow shell based 2022-07-08 08:02:11 +00:00
Madeleine Masser-Frye
8e6aa12b2b restore flatten 2022-07-08 08:01:10 +00:00
David Harris
76ab5e7993 makefile 2022-07-07 16:43:03 -07:00
David Harris
10ebcd1f95 CoreMark makefile tuning 2022-07-07 16:42:30 -07:00
Katherine Parry
905b7ffc84 moved unsused division code again 2022-07-07 16:41:26 -07:00
cturek
b7e590ebb0 Sqrt exponents 2022-07-07 23:34:56 +00:00
Katherine Parry
5751d86f69 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-07-07 16:29:44 -07:00
Katherine Parry
2bbde827e6 Revert "moved old divsqrt to unusedsrc" 
This reverts commit c9f5ae12ea.
 2022-07-07 16:29:17 -07:00
DTowersM
5a68ff9afb Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into HEAD 2022-07-07 23:11:35 +00:00
DTowersM
d55833e4f3 new slim benchmarks/coremark directory now works on addins/coremark repo, removed old riscv-coremark directory 2022-07-07 23:11:02 +00:00
Katherine Parry
c9f5ae12ea moved old divsqrt to unusedsrc 2022-07-07 16:09:56 -07:00
Katherine Parry
41c16be012 srt divider merged into fpu 2022-07-07 16:01:33 -07:00
cturek
b41a6f069b Seventeen Square Root Tests 2022-07-07 22:48:46 +00:00
David Harris
96a75d7749 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-07 22:00:59 +00:00
Katherine Parry
08769e35ae modified wally shared 2022-07-07 21:59:43 +00:00
David Harris
2f342c430e fixing port errors 2022-07-07 21:57:10 +00:00
Katherine Parry
0b40f38f02 added load and store test 2022-07-07 21:48:51 +00:00
cturek
89e17b6f3c Preprocessing for square root 2022-07-07 21:23:30 +00:00
David Harris
88e3233935 Preliminary SRAM integration 2022-07-07 19:56:20 +00:00
Madeleine Masser-Frye
3135e1202e plot tuning, fo4 axis 2022-07-07 16:44:02 +00:00