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Author SHA1 Message Date
Katherine Parry
cfcaddf8aa Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-06-06 16:06:54 +00:00
Katherine Parry
8fa0fc4229 fma synth warnings and errors removed 2022-06-06 16:06:04 +00:00
Ross Thompson
882f174553 Modified debugger for updated rtl. 2022-06-04 14:39:55 -05:00
slmnemo
7f70655113 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-06-03 18:56:29 -07:00
slmnemo
3fe78c9084 Fixed recurrent issue with testbench where it would never stop 2022-06-03 18:56:24 -07:00
cturek
afdfe770fc Added integer division in srt, parametrized everything to work with integers and floating points, parametrized testbench. 2022-06-04 00:14:10 +00:00
Madeleine Masser-Frye
411243f335 added area, leakage, energy, adjustment by adder width (N/32) 2022-06-03 23:51:34 +00:00
Madeleine Masser-Frye
8c84d5fdc7 added combined process regression line 2022-06-03 22:53:03 +00:00
Madeleine Masser-Frye
55f3c479e6 removing plots and archived runs from repo 2022-06-03 22:15:51 +00:00
DTowersM
caaf56cbf7 testbench now reads begin_signature addr from .objdump.addr instead of from tests.vh 2022-06-03 22:07:14 +00:00
Madeleine Masser-Frye
865126e636 stop tracking runArchive and ppa plots 2022-06-03 22:03:26 +00:00
Madeleine Masser-Frye
b5b29ea705 plots and synth runs 2022-06-03 21:23:04 +00:00
Madeleine Masser-Frye
1bf1a6d3a5 update 2022-06-03 21:17:50 +00:00
Madeleine Masser-Frye
56a053fc3d Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-06-03 21:08:49 +00:00
Madeleine Masser-Frye
31e9d0a41a added muxes and inv, fixed priority encoder 2022-06-03 21:03:13 +00:00
Katherine Parry
fd980fe9d6 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-06-03 15:34:27 +00:00
Katherine Parry
6b39b8c702 fixed compilation errors 2022-06-03 15:34:17 +00:00
slmnemo
9d1dfbdb50 Changed NO_SPOOFING from 0 to 1 in buildroot-no-trace to better facilitate wally booting linux without following QEMU's trace 2022-06-03 04:55:14 -07:00
Katherine Parry
8420b1e87c removed some debuging code accedentally pushed 2022-06-02 22:45:19 +00:00
Katherine Parry
6a4502e987 added rv64fpquad 2022-06-02 22:10:00 +00:00
Katherine Parry
cd8b2a2b98 added config rv64fpquad 2022-06-02 22:09:11 +00:00
David Harris
c74fec7fa6 renamed sim-fp to sim-testfloat 2022-06-02 15:05:29 -07:00
Katherine Parry
21f7d16005 added create all vectores file 2022-06-02 21:56:47 +00:00
Katherine Parry
03280c0f9c added createallvectors 2022-06-02 21:56:05 +00:00
David Harris
0195178a79 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-06-02 20:50:56 +00:00
Katherine Parry
f573f9d17b removed fp vectors 2022-06-02 20:50:32 +00:00
David Harris
4c702fa03c Reverted fp testcase ignore 2022-06-02 20:50:23 +00:00
David Harris
bb30c90eeb Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-06-02 20:48:34 +00:00
David Harris
ed7d6d4c28 mulAdd tests in gitignore 2022-06-02 20:48:14 +00:00
Katherine Parry
94867e3b14 added testvectors fp 2022-06-02 20:48:10 +00:00
slmnemo
c8515001a2 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-06-02 12:54:08 -07:00
Katherine Parry
9a09ee3a35 fpu paramaterized - except fdivsqrt 2022-06-02 19:50:28 +00:00
slmnemo
88454aa2ab Revert "parametrized linux testbench's DEBUG_TRACE and added parameters to relevant calls of the linux testbench in wally-pipelined.do" 
This reverts commit 89c7438424.
 2022-06-02 12:45:21 -07:00
slmnemo
ad9e85beb9 Revert "Fixed buildroot by adding a second ." 
This reverts commit 8b27c1884e.
 2022-06-02 12:43:59 -07:00
slmnemo
65b8d0c32a Revert "Added parameter to keep tracking on for buildroot and buildroot-checkpoint in regression.py" 
This reverts commit e33ca59d46.
 2022-06-02 12:41:01 -07:00
slmnemo
0d650b2880 Revert "Added parameters for DEBUG_TRACE to buildroot, buildroot-checkpoint, and buildroot-notrace" 
This reverts commit e4024eb503.
 2022-06-02 12:40:46 -07:00
David Harris
1d8bc2dc1b Added stalls for pending SFENCE.VMA and FENCE.I in hazard unit 2022-06-02 09:37:59 -07:00
David Harris
154410a37f Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-06-02 15:48:36 +00:00
David Harris
faa15b1f8d Cleaned up comments in controller 2022-06-02 15:48:33 +00:00
David Harris
197b588193 Cleaned up test cases in testbench 2022-06-02 08:44:28 -07:00
David Harris
c7ec9282fe Provided sfencevmaM to hazard unit and renamed TLBFlush signals to sfencevma going into LSU/IFU. Preparing for SFENCE.VMA to flush the pipeline, but that is not yet working. 2022-06-02 14:18:55 +00:00
slmnemo
c16c5beef5 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-06-02 02:52:03 +00:00
slmnemo
65961223f8 Updated Linux testbench to use new force/unforce method for Branch predictor init and removed related .txt files 2022-06-02 02:51:51 +00:00
Katherine Parry
e42afbfb30 paramerterized some small fma units 2022-06-01 23:34:29 +00:00
Madeleine Masser-Frye
30f4a7e37b Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-06-01 21:02:55 +00:00
Madeleine Masser-Frye
bed4fad7b2 fixed errors in synth.out by switching ( to { 2022-06-01 21:02:49 +00:00
DTowersM
215f69a2ab Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-06-01 21:00:51 +00:00
DTowersM
d28b4cf602 added support for embench post processing to testbench.sv 2022-06-01 21:00:44 +00:00
DTowersM
ee7070c5b6 some changes to further support vsim on embench 2022-06-01 17:19:19 +00:00
Katherine Parry
dd19e55b8f unpacker optimizations 2022-06-01 16:52:21 +00:00