Xavi/cvw
1
0
Fork 0
forked from Github_Repos/cvw
Code Issues Pull Requests Packages Projects Releases Wiki Activity
5,659 Commits 14 Branches 1 Tag 31 MiB
67072b89e9
Commit Graph

5659 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Ross Thompson
a61f8bc4cf Set bp to use instruction class prediction by default. 2023-03-01 11:52:42 -06:00
Ross Thompson
e8744684cd Branch predictor cleanup. 
I think Ch 10 is now done except for BTB performance analysis and the section on running benchmarks and collecting data.
 2023-03-01 11:24:24 -06:00
Ross Thompson
08a1153ae9 More btb cleanup. 2023-03-01 10:47:00 -06:00
Ross Thompson
dd2433f7ff Minor fix to btb. 2023-03-01 10:45:40 -06:00
Ross Thompson
e13ba72c61 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-01 10:04:13 -06:00
Ross Thompson
64b8b0ea21
Merge pull request #119 from eroom1966/main 
update ImperasDV testbench for memory privileges
 2023-03-01 09:50:00 -06:00
Ross Thompson
8fe750148e
Merge pull request #118 from davidharrishmc/dev 
Pulled to latest commit of riscv-arch-test
 2023-03-01 09:49:19 -06:00
eroom1966
72b92e8c0d update testbench for memory privileges 
also update configuration to define value of mimpid
 2023-03-01 15:37:11 +00:00
Ross Thompson
2773048bd4 Name cleanup. 2023-02-28 17:48:58 -06:00
David Harris
bd6a1dcf40 Pulled to latest commit of riscv-arch-test 2023-02-28 15:03:59 -08:00
Ross Thompson
87013ccaf0 Found the performance bug with the branch predictor btb power saving update. 2023-02-28 15:57:34 -06:00
Ross Thompson
8af61c0cc0 Name changes to reflect diagrams. 2023-02-28 15:37:25 -06:00
Ross Thompson
a823d8d021 Undid the btb update as it reduces performance. 2023-02-28 15:21:56 -06:00
Ross Thompson
3261f31e88 This icpred and btb changes are causing a performance issue. 2023-02-27 20:00:50 -06:00
Ross Thompson
69e8358639 Modified the BTB to save power by not updating when the prediction is unchanged. 2023-02-27 17:37:29 -06:00
Ross Thompson
44361f0a34 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-02-27 09:48:03 -06:00
Ross Thompson
1f10092f8f
Merge pull request #117 from davidharrishmc/dev 
ZMMUL support and MMU cleanup
 2023-02-27 09:46:40 -06:00
David Harris
5c8fee127b Added support for ZMMUL 2023-02-27 07:29:53 -08:00
Ross Thompson
a81cc883e9 Signal name changes. 2023-02-27 00:39:19 -06:00
David Harris
0d3d499940 hptw typo fix 2023-02-26 19:38:34 -08:00
Ross Thompson
447f6b1443 Branch predictor cleanup. 2023-02-26 21:28:36 -06:00
David Harris
907fbfec38 Simplified Access fault logic in HPTW 2023-02-26 18:50:37 -08:00
David Harris
fa5be45dcd Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-02-26 18:35:14 -08:00
David Harris
d3f5708ded StoreAmo faults are generated instead of load faults on AMO operations 2023-02-26 18:35:10 -08:00
Ross Thompson
3804626166 Create module for instruction class prediction and decoding. 2023-02-26 20:20:30 -06:00
Ross Thompson
86f611577f Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-02-26 19:58:24 -06:00
David Harris
d2fd34efe6 Renamed DAPageFault to UpdateDA 2023-02-26 17:51:45 -08:00
David Harris
246deeda82 renamed UpperBitsUnequalPageFault to UpperBitsUnequal 2023-02-26 17:32:34 -08:00
David Harris
099267ffce moved tlb to subdirectory 2023-02-26 17:31:03 -08:00
David Harris
a9e884acc8 Moved TLB into subdirectory of MMU 2023-02-26 17:28:05 -08:00
Ross Thompson
52faec7922
Merge pull request #116 from davidharrishmc/dev 
Removed unneeded TLBFlush from TLBMiss logic
 2023-02-26 12:07:41 -06:00
Ross Thompson
bb276da6eb Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-02-26 12:06:06 -06:00
David Harris
ab178d0956 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-02-26 10:04:47 -08:00
David Harris
2ad62ea31f Removed unneeded TLBFlush from TLBMiss 2023-02-26 10:04:16 -08:00
Ross Thompson
f411e63dc8
Merge pull request #115 from davidharrishmc/dev 
Fixed SSTC being unusable in M-MODE without Status.TM.  Disable STIME…
 2023-02-26 12:02:54 -06:00
David Harris
2203c05724 Access faults are geted by ~TLBMiss rather than ~(Translate & ~TLBHit) 2023-02-26 09:58:34 -08:00
David Harris
4579a9d0c2 Renamed HPTW_WRITES_SUPPORTED to SVADU_SUPPORTED 2023-02-26 09:38:32 -08:00
David Harris
e3e5100f8d Renamed DAPageFault to HPTWDAPageFault in hptw to avoid name conflict with DAPageFault from tlbcontrol 2023-02-26 07:12:43 -08:00
David Harris
d50658addf Fixed missing assign when SSTC is not supported 2023-02-26 07:12:13 -08:00
David Harris
27acb90217 Fixed SSTC being unusable in M-MODE without Status.TM. Disable STIMECMP registers when SSTC_SUPPORTED = 0 2023-02-26 06:30:43 -08:00
Ross Thompson
7500bb75c6 PHT was enabled using the wrong ~flush and ~stall. 2023-02-24 22:57:32 -06:00
Ross Thompson
63b9f9ca3d gshare cleanup. 2023-02-24 22:55:51 -06:00
Ross Thompson
eb8d6f016f Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-02-24 19:57:18 -06:00
Ross Thompson
ed7ab402ad More signal renames. 2023-02-24 19:56:55 -06:00
Ross Thompson
e549bec060 Renamed signals to match new figures. 2023-02-24 19:51:47 -06:00
Ross Thompson
6ff524d843 Renamed signals to match figure 10.18. 2023-02-24 19:22:14 -06:00
David Harris
db5aa5a0fd
Merge pull request #114 from ross144/main 
Fix the branch predictor's gshare and btb critical path issue
 2023-02-24 16:55:34 -08:00
Ross Thompson
ea71fd09f5 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-02-24 18:50:35 -06:00
Ross Thompson
4058a49985 Possible fix to btb performance issue. 2023-02-24 18:36:41 -06:00
Ross Thompson
5c52827f51 Cleanup. 2023-02-24 18:20:42 -06:00