1006 Commits

Author	SHA1	Message	Date
Katherine Parry	5bb1478859	renamed signals in ocde to match book	2022-07-18 17:31:17 +00:00
Katherine Parry	a4cd157f00	forgot some files	2022-07-15 21:42:45 +00:00
Katherine Parry	e498d87c5c	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally	2022-07-15 20:17:08 +00:00
Katherine Parry	e251022269	merged floating-point radix-2 divider with radix-4	2022-07-15 20:16:59 +00:00
cturek	ec9536f983	Square root radix 2 working, does not work with division	2022-07-14 22:52:09 +00:00
cturek	9f18f6a203	Square root	2022-07-14 21:19:45 +00:00
cturek	38bbd19abf	Six tests passing and a bunch of sizizing issues fixed	2022-07-14 19:38:27 +00:00
Katherine Parry	a0e9e93d4f	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally	2022-07-14 18:16:13 +00:00
Katherine Parry	b069cfbec2	fixed error in divsqrt	2022-07-14 18:16:00 +00:00
cturek	f49c2a969f	S and SM are updating but are not correct yet	2022-07-14 00:39:30 +00:00
Katherine Parry	e5a8ac2a44	renamed a file to fit diagram	2022-07-13 23:44:54 +00:00
cturek	7629173b15	DIVLEN and counter updated for sqrt computation and rounding	2022-07-13 22:42:39 +00:00
Katherine Parry	7e163e22a3	some code cleanup	2022-07-13 15:28:22 -07:00
Katherine Parry	77ea4e47cb	removed minus 1 case in rounding	2022-07-13 15:01:38 -07:00
cturek	d57fb6f98a	radix 4 files removed from srt and divlen modified for sqrt	2022-07-13 19:46:48 +00:00
cturek	9b7e63f482	Lint error fixed and added comments to preprocessing	2022-07-13 19:34:04 +00:00
cturek	81f396f885	Testbench accepts standard test vector files	2022-07-13 18:30:18 +00:00
cturek	11bb3f0a3e	Test generation files in common format	2022-07-13 18:11:13 +00:00
cturek	110b762b55	Finalized sqrt, ready for debugging	2022-07-13 17:56:23 +00:00
cturek	31db938e7e	Added adder input selection to on the fly converter	2022-07-13 17:47:27 +00:00
cturek	bb7e73abf0	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally	2022-07-13 17:36:56 +00:00
Katherine Parry	26e39dd325	removed the +1 in the cvt	2022-07-13 09:41:35 -07:00
Katherine Parry	e05b2a07d2	removed warnings and took a mux out of the critical path	2022-07-12 18:32:17 -07:00
cturek	5c9f011561	little fix	2022-07-12 23:04:33 +00:00
cturek	ed9106128f	Square root implemented	2022-07-12 22:45:54 +00:00
Katherine Parry	452b017f9a	found the bug in the store modification	2022-07-12 22:42:19 +00:00
Katherine Parry	2ada8a8bc1	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally	2022-07-12 22:37:20 +00:00
cturek	9d4acc9ddb	C register and other various fixes	2022-07-12 22:18:56 +00:00
cturek	3483b92480	On the fly conversion for square root	2022-07-12 02:21:38 +00:00
Katherine Parry	5c0ecfa433	forgot a file	2022-07-11 18:31:51 -07:00
Katherine Parry	7815b81716	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-07-11 18:30:29 -07:00
Katherine Parry	b728e5054d	variable interations implemented in radix-4 divider	2022-07-11 18:30:21 -07:00
DTowersM	191c7a2ee3	added some preliminary support for coremark XLEN=32, made sure rv64 not impacted	2022-07-11 21:13:09 +00:00
David Harris	2bc8ff555b	added comment about checking SRAM size	2022-07-10 12:48:51 +00:00
David Harris	9cb675b2e4	added comment about RAMs in cacheway	2022-07-10 12:47:34 +00:00
Katherine Parry	ca4fe08fd9	renamed FLoad2 to FStore2	2022-07-09 00:26:45 +00:00
Katherine Parry	cd53ae67d9	moved fpu ieu write data mux to lsu	2022-07-08 23:56:57 +00:00
cturek	2dc074ea93	F Selection	2022-07-08 21:53:52 +00:00
Katherine Parry	3476579e02	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-07-08 12:30:50 -07:00
Katherine Parry	9ef45f36fd	renamed signals in cvt and prostproc	2022-07-08 12:30:43 -07:00
James Stine	c5dfefe669	Update SRAM to /proj/wally	2022-07-08 08:09:55 -05:00
David Harris	d10ad0e883	Removed testbench code that ignores mismatch on zero signatures	2022-07-08 09:17:31 +00:00
David Harris	c72e4d43d2	erge branch 'main' of https://github.com/davidharrishmc/riscv-wally	2022-07-08 09:09:07 +00:00
David Harris	381f3298d8	Moved HWSTRB to ahblite, factored out of peripherals. Moved old AHB peripherals to unusedsrc	2022-07-08 09:09:02 +00:00
David Harris	1ce0975366	Adjusting byte writes to RAM	2022-07-08 08:45:21 +00:00
David Harris	3f9e662201	Removed subwordwrite mention in cache because sww is needed to replicate data across byte enables	2022-07-08 08:44:37 +00:00
David Harris	9b6d9666c5	Removed unused swbytemask from CLINT	2022-07-08 08:43:24 +00:00
Katherine Parry	905b7ffc84	moved unsused division code again	2022-07-07 16:41:26 -07:00
cturek	b7e590ebb0	Sqrt exponents	2022-07-07 23:34:56 +00:00
Katherine Parry	5751d86f69	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-07-07 16:29:44 -07:00