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Author SHA1 Message Date
Shreya Sanghai
6a1f1e2496 changed filename 2022-02-28 17:33:15 +00:00
Shreya Sanghai
06c2744ac1 Copied previous cofig file instead of orig 2022-02-28 17:32:08 +00:00
Shreya Sanghai
db38b69f83 Makefile for running multiple synthesis 2022-02-28 17:15:43 +00:00
Shreya Sanghai
5b30fb7328 added make allsynth 2022-02-28 17:15:43 +00:00
David Harris
3a43450ac9 hptw cleanup for synthesis 2022-02-28 05:54:34 +00:00
David Harris
9b4d6427f4 Corrected printing doubles 2022-02-28 04:28:07 +00:00
David Harris
9ca4942994 ZMerge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-02-28 04:15:23 +00:00
David Harris
0cc09ed918 Enhanced printing intermediate results in fpcalc.c 2022-02-28 04:15:20 +00:00
Kip Macsai-Goren
6f701a16b3 added snippet to ignore comments in .diff files as well 2022-02-27 23:29:46 +00:00
Kip Macsai-Goren
369e799ce3 added minor sections to MMU tests that had been missing, global bits still need to be checked 2022-02-27 23:28:44 +00:00
David Harris
50f5607799 New softfloat_calc program 2022-02-27 20:35:01 +00:00
David Harris
f4be78ecc3 Created softfloat_demo showcasing how to do math with SoftFloat 2022-02-27 18:17:21 +00:00
David Harris
dbd73e8cfd Moved regression work directories to regression/wkdir to reduce clutter 2022-02-27 17:35:09 +00:00
David Harris
3675a813c6 Linking against riscv-isa-sim SoftFloat library for RISC-V NaN behavior 2022-02-27 17:23:33 +00:00
David Harris
62d62f9a9e Moved FMA back into source tree to facilitate synthesis 2022-02-27 15:41:41 +00:00
David Harris
5b15e552c6 Temporarily removed tests/imperas-riscv-tests from Makefile because of license issue 2022-02-27 15:12:10 +00:00
David Harris
c35a071203 Moved fma directory 2022-02-27 14:20:15 +00:00
David Harris
283a25e1a7 fma simulation infrastructure 2022-02-27 04:36:43 +00:00
David Harris
40bc380073 fma passing multiply vectors 2022-02-27 04:36:01 +00:00
James E. Stine
06564b802e Update FP vector scripts for testing 754 2022-02-26 14:17:41 -06:00
James E. Stine
c73363cfd7 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-02-26 14:10:54 -06:00
James E. Stine
85b5d92f3f Update Makefile for SoftFloat-3e 2022-02-26 14:10:27 -06:00
David Harris
f29cc4b33f simplified fma Makefile 2022-02-26 19:55:42 +00:00
David Harris
b2db58e982 Made softfloat.a a symlink 2022-02-26 19:53:04 +00:00
David Harris
a9f9cfa5b6 Added start of fma 2022-02-26 19:51:19 +00:00
James E. Stine
e295785b45 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-02-26 13:20:59 -06:00
James E. Stine
896fc0be0e Update sample SoftFloat programs 2022-02-26 13:20:50 -06:00
David Harris
ff674b695c Moved Softfloat / TestFloat 2022-02-26 19:17:32 +00:00
James E. Stine
860eca356e Delete unused FP vector scripts 2022-02-26 13:02:57 -06:00
Kip Macsai-Goren
2da39c7052 allowed for vectored and unvectored interrupts in trap handlers 2022-02-25 23:57:45 +00:00
Kip Macsai-Goren
ac03a95aeb added support for trap handlers in in multiple pivilege modes 2022-02-25 23:57:45 +00:00
bbracker
2ef97b9841 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-02-25 23:51:48 +00:00
bbracker
8518fd44a5 revived checkpointing and hacked it up to generate a trace starting at the checkpoint 2022-02-25 23:51:40 +00:00
bbracker
8eb7ab0dca parser rename 2022-02-25 20:05:10 +00:00
David Harris
b3eefec427 Removed tests/imperas-riscv-tests/riscv-target/risdcvOVPsimPlus/device/rv64i-perip to stop makefile issues compiling Imperas tests. Still need to port other imperas-riscv-tests 2022-02-25 18:17:05 +00:00
kaveh Pezeshki
4e20df64e2 Updated busybox disassembly 2022-02-24 04:49:04 +00:00
kaveh Pezeshki
09a1519dce removed verbose cpio and excluded /dev/console 2022-02-24 00:08:10 +00:00
David Harris
5d7d40a4c7 Linux disassembly makefile 2022-02-24 00:05:23 +00:00
Ross Thompson
730fdb029a Fixed bug with DAPageFault being wrong when HPTW writes not supported. 2022-02-23 10:54:34 -06:00
Ross Thompson
6f53f7943f More spillsupport more structual. 2022-02-23 10:27:14 -06:00
Ross Thompson
19ec874641 Fixed bug with spill support and Instruction DA Page Faults. 2022-02-23 10:16:12 -06:00
Ross Thompson
15f6871a8d Added generates to pcnextf muxes for privileged and caches. 2022-02-22 22:45:00 -06:00
Ross Thompson
834b308ed6 Fixed "bug" with wally-pipelined.do 2022-02-22 22:19:25 -06:00
Ross Thompson
59f04f2518 Minor busdp cleanup. 2022-02-22 17:28:26 -06:00
Ross Thompson
ea29291024 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-02-22 14:45:53 -06:00
Ross Thompson
971dd494f6 Clarified interlockfsm. 2022-02-22 11:31:28 -06:00
bbracker
2322e66f9f fix lint bugs in PLIC and UART 2022-02-22 05:04:18 +00:00
bbracker
ac114e1c6d Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-02-22 04:27:50 +00:00
bbracker
202bd2f8f8 change UART PLIC IRQ mapping from 4 to 10 to match virt model; move WALLY-PERIPH tests to wally arch tests 2022-02-22 03:46:08 +00:00
bbracker
c26526c9f3 change RX side of UART to aslo be LSB-first 2022-02-22 03:34:08 +00:00