added minor sections to MMU tests that had been missing, global bits still need to be checked

This commit is contained in:
Kip Macsai-Goren 2022-02-27 23:28:25 +00:00
parent 50f5607799
commit 369e799ce3
8 changed files with 246 additions and 74 deletions

View File

@ -41,14 +41,14 @@ beef0110
00000bad
0000000f
beef0bb0
00000009
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
beef0077 # Test 12.3.1.4.1: successful read back of saved value with new memory mapping
00000009 # Test 12.3.1.5.1: ecall from going to m mode from s mode
00000000 # previous value of mprv before being set
beef0099 # Read success from translated address when mprv=1, mpp=S and priv mode = m
0000000b # Test 12.3.1.5.2: ecall from going to S mode from m mode
00000009 # ecall from going straight back to m mode to access mstatus
00000000 # previous zeroed out value of mprv
0000000b # ecall from terminating tests in m mode
deadbeef
deadbeef
deadbeef

View File

@ -40,9 +40,9 @@ test_cases:
# Here is where the actual tests are held, or rather, what the actual tests do.
# each entry consists of 3 values that will be read in as follows:
#
# '.8byte [x28 Value], [x29 Value], [x30 value]'
# '.4byte [x28 Value], [x29 Value], [x30 value]'
# or
# '.8byte [address], [value], [test type]'
# '.4byte [address], [value], [test type]'
#
# The encoding for x30 test type values can be found in the test handler in the framework file
#
@ -70,6 +70,9 @@ test_cases:
# Level 0 page table B
.4byte 0x80015FFC, 0x202004C7, write32_test # Vaddr 0xBFF000 Paddr 0x80801000: aligned kilopage with X=0, U=0
# second page table to check context switches with satp
.4byte 0x8000F000, 0x200000CF, write32_test # Vaddr 0x0 Paddr 0x80000000: aligned megapage
.4byte 0x8000F800, 0x200000CF, write32_test # Vaddr 0x80000000 Paddr 0x80000000: aligned megapage (program and data memory)
# test 12.3.1.1.2 write values to Paddrs in each page
# each of these values is used for 12.3.1.1.3 and some other tests, specified in the comments.
@ -96,7 +99,7 @@ test_cases:
.4byte 0x8000FFA4, 0x00008067, read32_test
# test 12.3.1.1.4 check translation works in sv48, read the same values from previous tests, this time with Vaddrs
.4byte 0x0, 0x0, goto_sv32 # satp.MODE = sv32, Nothing written to output
.4byte 0x8000D, 0x0, goto_sv32 # satp.MODE = sv32, Nothing written to output
.4byte 0x4AAAA8, 0xBEEF0055, read32_test # megapage at Vaddr 0x400000, Paddr 0x80000000
.4byte 0xBFF7E0, 0xBEEF0099, read32_test # kilopage at Vaddr 0xBFF000, Paddr 0x80201000
@ -159,6 +162,35 @@ test_cases:
.4byte 0x4658, 0xBEEF0AA0, write32_test # store page fault when D=0
.4byte 0x4AA0, 0xBEEF0BB0, read32_test # read success when D=0
# =========== test 12.3.1.4 SATP Register ===========
# test 12.3.1.4.1 SATP ASID and PPN fields (test having two page tables with different ASID)
// *** .4byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, write32_test # write identical value to global PTE to make sure it's still in the TLB
.4byte 0x8000F, 0x11, goto_sv32 # go to SV39 on a second, very minimal page table
.4byte 0xE3130, 0xBEEF0077, read32_test # Read success of old written value from a new page table mapping
# test 12.3.1.4.2 Test Global mapping
// ***.4byte 0x7FFFFFF888, 0x0220DEADBEEF0099, read32_test # read success of global PTE undefined in current mapping.
# =========== test 12.3.1.5 STATUS Registers ===========
# test 12.3.1.5.1 mstatus.mprv translation
# *** mstatus.mprv = 0 tested on every one of the translated reads and writes before this.
.4byte 0x8000D, 0x0, goto_sv32 // go back to old, extensive page table
.4byte 0x80000000, 0x1, goto_m_mode // go to m mode to be able to write mstatus
.4byte 0x1, 0x1, read_write_mprv // write 1 to mstatus.mprv and set mstatus.mpp to be 01=S
.4byte 0xBFF7E0, 0xBEEF0099, read32_test // read test succeeds with translation even though we're in M mode since MPP=S and MPRV=1
# test 12.3.1.5.2 mstatus.mprv clearing
# mstatus.mprv is already 1 from the last test so going to S mode should clear it with the mret
.4byte 0x80000000, 0x1, goto_s_mode // This should zero out the mprv bit but now to read and write mstatus, we have to
.4byte 0x80000000, 0x1, goto_m_mode // go back to m mode to allow us to reread mstatus.
.4byte 0x0, 0x0, read_write_mprv // read what should be a zeroed out mprv value and then force it back to zero.
# test 12.3.1.5.3 sstatus.mxr read
# this bitfield already tested in 12.3.1.3.3
# terminate tests
.4byte 0x0, 0x0, terminate_test # brings us back into machine mode with a final ecall, writing 0x9 to the output.

View File

@ -398,17 +398,17 @@ trap_return_pagetype_table:
// Turn translation off
li x7, 0 // satp.MODE value for bare metal (0)
slli x7, x7, 31
li x28, 0x8000D // Base Pagetable physical page number, satp.PPN field. *** add option for different pagetable location
add x7, x7, x28
csrw satp, x7
sfence.vma x0, x0 // *** flushes global pte's as well
.endm
.macro GOTO_SV32
.macro GOTO_SV32 ASID BASE_PPN
// Turn on sv39 virtual memory
li x7, 1 // satp.MODE value for Sv32 (1)
slli x7, x7, 31
li x28, 0x8000D // Base Pagetable physical page number, satp.PPN field. *** add option for different pagetable location
li x29, \ASID
slli x29, x29, 22
or x7, x7, x29 // put ASID into the correct field of SATP
li x28, \BASE_PPN // Base Pagetable physical page number, satp.PPN field.
add x7, x7, x28
csrw satp, x7
sfence.vma x0, x0 // *** flushes global pte's as well
@ -611,7 +611,14 @@ goto_baremetal:
j test_loop // go to next test case
goto_sv32:
GOTO_SV32
// Turn sv48 translation on
// Base PPN in x28, ASID in x29
li x7, 1 // satp.MODE value for sv32 (1)
slli x7, x7, 31
slli x29, x29, 22
or x7, x7, x29 // put ASID into the correct field of SATP
or x7, x7, x28 // Base Pagetable physical page number, satp.PPN field.
csrw satp, x7
j test_loop // go to next test case
write_mxr_sum:
@ -625,6 +632,29 @@ write_mxr_sum:
csrs sstatus, x29
j test_loop
read_write_mprv:
// reads old mstatus.mprv value to output, then
// Writes mstatus.mprv with the 1 bit value in x29. assumes we're in m mode
li x30, 0x20000 // mask bits for mprv
csrr x7, mstatus
and x7, x7, x30
srli x7, x7, 17
sw x7, 0(x6) // store old mprv to output
addi x6, x6, 4
addi x16, x16, 4
not x7, x29
slli x7, x7, 17
slli x29, x29, 17
csrc mstatus, x7
csrs mstatus, x29 // clear or set mprv bit
li x7, 0x1800
csrc mstatus, x7
li x7, 0x800
csrs mstatus, x7 // set mpp to supervisor mode to see if mprv=1 really executes in the mpp mode
j test_loop
write_pmpcfg_0:
// writes the value in x29 to the pmpcfg register specified in x28.
// then writes the final value of pmpcfgX to the output.

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@ -1,30 +1,30 @@
0000000b # Test 12.3.1.1.3: ecall from going to S mode from M mode
00000000
beef0000 # 7 read test successes
beef0000 # Read test success from confirming writes of known values
0000dead
beef0055 # read 2
beef0055 # Read test success from confirming writes of known values
0880dead
beef0033 # read 3
beef0033 # Read test success from confirming writes of known values
0990dead
beef0077 # read 4
beef0077 # Read test success from confirming writes of known values
0110dead
beef0099 # read 5
beef0099 # Read test success from confirming writes of known values
0220dead
beef0440 # read 6
beef0440 # Read test success from confirming writes of known values
0330dead
beef0bb0 # read 7
beef0bb0 # Read test success from confirming writes of known values
0440dead
beef0000 # Test 12.3.1.1.4: 3 read test successes
beef0000 # Test 12.3.1.1.4: Read test success from checking translation works
0000dead
beef0055 # read 2
beef0055 # Read test success from checking translation works
0880dead
beef0099 # read 3
beef0099 # Read test success from checking translation works
0220dead
0000000d # Test 12.3.1.2.1: 2 read tests with page fault
0000000d # Test 12.3.1.2.1: Read test with page fault from upper vaddr bits not the same
00000000
00000bad
00000000
0000000d # read 2
0000000d # Read test with page fault from upper vaddr bits not the same
00000000
00000bad
00000000
@ -96,7 +96,21 @@ beef0110 # Test 12.3.1.3.4: read test success
00000000
beef0bb0 # read test success
0440dead
00000009 # ecall from test termination from S mode
beef0000 # Test 12.3.1.4.1: read test success from new page table mapping
0000dead
00000009 # Test 12.3.1.5.1: ecall from going to m mode from s mode
00000000
00000000 # previous mprv value before writing 1 to it.
00000000
beef0099 # Read test success when mprv=1 So translation should occur
0220dead # even though we're in M mode with translation off
0000000b # Test 12.3.1.5.2 ecall from going to s mode from m mode (zeroing mprv)
00000000
00000009 # ecall from going to m mode from s mode (so we can access mstatus)
00000000
00000000 # previous mprv value zeroed out from mret after going to s mode.
00000000
0000000b # ecall from test termination from M mode
00000000
deadbeef # rest of the output space
deadbeef
@ -1008,17 +1022,3 @@ deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef

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@ -104,7 +104,21 @@ beef0110 # Test 12.3.1.3.4: read test success
00000000
beef0bb0 # read test success
0440dead
00000009 # ecall from test termination in S mode.
beef0000 # Test 12.3.1.4.1: read test success on new page table mapping
0000dead
00000009 # Test 12.3.1.5.1: ecall from going to m mode from s mode
00000000
00000000 # previous value of mprv before write
00000000
beef0099 # Read test success when mprv=1 So translation should occur
0220dead # even though we're in M mode with translation off
0000000b # Test 12.3.1.5.2 ecall from going to s mode from m mode (zeroing mprv)
00000000
00000009 # ecall from going to m mode from s mode (so we can access mstatus)
00000000
00000000 # previous mprv value zeroed out from mret after going to s mode.
00000000
0000000b # ecall from test termination in S mode.
00000000
deadbeef # rest of the output space
deadbeef
@ -1008,17 +1022,3 @@ deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef
deadbeef

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@ -83,10 +83,14 @@ test_cases:
# Level 0 page table B
.8byte 0x0000000080016FF8, 0x00000000200804CF, write64_test# Vaddr 0xFFFFFFFFFFFFF000, Paddr 0x80201000 aligned kilopage
# second page table to check context switches with satp
.8byte 0x8FFFF000, 0x200000CF, write64_test# Vaddr 0x0, Paddr 0x80000000 aligned gigapage
.8byte 0x8FFFF010, 0x200000CF, write64_test# Vaddr 0x8000_0000, Paddr 0x80000000: aligned gigapage (program and data memory so we can execute without jumping around)
# test 12.3.1.1.2 write values to Paddrs in each page
# each of these values is used for 12.3.1.1.3 and some other tests, specified in the comments.
# when a test is supposed to fault, nothing is written into where it'll be reading/executing since it shuold fault before getting there.
.8byte 0x80200AB0, 0x0000DEADBEEF0000, write64_test# 12.3.1.1.4
.8byte 0x80200AB0, 0x0000DEADBEEF0000, write64_test# 12.3.1.1.4 and 12.3.1.4.1
.8byte 0x800FFAB8, 0x0880DEADBEEF0055, write64_test# 12.3.1.1.4
.8byte 0x80200AC0, 0x0990DEADBEEF0033, write64_test# 12.3.1.3.2
.8byte 0x80203130, 0x0110DEADBEEF0077, write64_test# 12.3.1.3.2
@ -108,7 +112,7 @@ test_cases:
.8byte 0x80203AA0, 0x0440DEADBEEF0BB0, read64_test
# test 12.3.1.1.4 check translation works in sv39, read the same values from previous tests, this time with Vaddrs
.8byte 0x0, 0x0, goto_sv39 # satp.MODE = sv39, current VPN: gigapage at 0x80000000. Nothing written to output
.8byte 0x8000D, 0x0, goto_sv39 # satp.MODE = sv39, with base page table PPN = 0x8000D and ASID = 0. current VPN: gigapage at 0x80000000.
.8byte 0x80200AB0, 0x0000DEADBEEF0000, read64_test # gigapage at Vaddr 0x80000000, Paddr 0x80000000
.8byte 0x400FFAB8, 0x0880DEADBEEF0055, read64_test # megapage at Vaddr 0x40400000, Paddr 0x80000000
.8byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, read64_test # kilopage at Vaddr 0xFFFFFFFFFFFFF000, Paddr 0x80201000
@ -175,6 +179,35 @@ test_cases:
.8byte 0x4658, 0x0440DEADBEEF0AA0, write64_test# store page fault when D=0
.8byte 0x4AA0, 0x0440DEADBEEF0BB0, read64_test# read success when D=0
# =========== test 12.3.1.4 SATP Register ===========
# test 12.3.1.4.1 SATP ASID and PPN fields (test having two page tables with different ASID)
// *** .8byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, write64_test # write identical value to global PTE to make sure it's still in the TLB
.8byte 0x8FFFF, 0x11, goto_sv39 # go to SV39 on a second, very minimal page table
.8byte 0x200AB0, 0x0000DEADBEEF0000, read64_test # Read success of old written value from a new page table mapping
# test 12.3.1.4.2 Test Global mapping
// ***.8byte 0x7FFFFFF888, 0x0220DEADBEEF0099, read64_test # read success of global PTE undefined in current mapping.
# =========== test 12.3.1.5 STATUS Registers ===========
# test 12.3.1.5.1 mstatus.mprv translation
# *** mstatus.mprv = 0 tested on every one of the translated reads and writes before this.
.8byte 0x8000D, 0x0, goto_sv39 // go back to old, extensive page table
.8byte 0x80000000, 0x1, goto_m_mode // go to m mode to be able to write mstatus
.8byte 0x1, 0x1, read_write_mprv // write 1 to mstatus.mprv and set mstatus.mpp to be 01=S
.8byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, read64_test // read test succeeds with translation even though we're in M mode since MPP=S and MPRV=1
# test 12.3.1.5.2 mstatus.mprv clearing
# mstatus.mprv is already 1 from the last test so going to S mode should clear it with the mret
.8byte 0x80000000, 0x1, goto_s_mode // This should zero out the mprv bit but now to read and write mstatus, we have to
.8byte 0x80000000, 0x1, goto_m_mode // go back to m mode to allow us to reread mstatus.
.8byte 0x0, 0x0, read_write_mprv // read what should be a zeroed out mprv value and then force it back to zero.
# test 12.3.1.5.3 sstatus.mxr read
# this bitfield already tested in 12.3.1.3.3
# terminate tests
.8byte 0x0, 0x0, terminate_test # brings us back into machine mode with a final ecall, writing 0x9 to the output.

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@ -91,6 +91,14 @@ test_cases:
# Level 0 page table B
.8byte 0x000000008001AFF8, 0x00000000200804CF, write64_test # Vaddr 0xFFFFFFFFF000, Paddr 0x80201000: aligned kilopage
# second page table to check context switches with satp
# Level 3 page table A
.8byte 0x8000F000, 0x2000BC01, write64_test # points to level 2 page table A
# Level 2 page table A
.8byte 0x8002F000, 0x200000CF, write64_test # Vaddr 0x0, Paddr 0x80000000: aligned gigapage
.8byte 0x8002F010, 0x200000CF, write64_test # Vaddr 0x80000000, Paddr 0x80000000: aligned gigapage (data and instr memory)
# test 12.3.1.1.2 write values to Paddrs in each page
# each of these values is used for 12.3.1.1.3 and some other tests, specified in the comments.
# when a test is supposed to fault, nothing is written into where it'll be reading/executing since it should fault before getting there.
@ -119,7 +127,7 @@ test_cases:
.8byte 0x80203AA0, 0x0440DEADBEEF0BB0, read64_test
# test 12.3.1.1.4 check translation works in sv48, read the same values from previous tests, this time with Vaddrs
.8byte 0x0, 0x0, goto_sv48 # satp.MODE = sv48, current VPN: megapage at 0x80000000. Nothing written to output
.8byte 0x8000D, 0x0, goto_sv48 # satp.MODE = sv48, with base page table PPN = 0x8000D and ASID = 0. current VPN: megapage at 0x80000000. Nothing written to output
.8byte 0x10082777778, 0x0EE0DEADBEEF0CC0, read64_test # terapage at Vaddr 0x010000000000, Paddr 0x0
.8byte 0x8005BC0AB0, 0x0000DEADBEEF0000, read64_test # gigapage at Vaddr 0x008000000000, Paddr 0x80000000
.8byte 0x800F0AB8, 0x0880DEADBEEF0055, read64_test # megapage at Vaddr 0x80000000, Paddr 0x80000000
@ -187,6 +195,35 @@ test_cases:
.8byte 0x80204658, 0x0440DEADBEEF0AA0, write64_test # write fault when D=0
.8byte 0x80204AA0, 0x0440DEADBEEF0BB0, read64_test# read success when D=0
# =========== test 12.3.1.4 SATP Register ===========
# test 12.3.1.4.1 SATP ASID and PPN fields (test having two page tables with different ASID)
// *** .8byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, write64_test # write identical value to global PTE to make sure it's still in the TLB
.8byte 0x8000F, 0x11, goto_sv48 # go to SV39 on a second, very minimal page table
.8byte 0x5BC0AB0, 0x0000DEADBEEF0000, read64_test # Read success of old written value from a new page table mapping
# test 12.3.1.4.2 Test Global mapping
// ***.8byte 0x7FFFFFF888, 0x0220DEADBEEF0099, read64_test # read success of global PTE undefined in current mapping.
# =========== test 12.3.1.5 STATUS Registers ===========
# test 12.3.1.5.1 mstatus.mprv translation
# *** mstatus.mprv = 0 tested on every one of the translated reads and writes before this.
.8byte 0x8000D, 0x0, goto_sv48 // go back to old, extensive page table
.8byte 0x80000000, 0x1, goto_m_mode // go to m mode to be able to write mstatus
.8byte 0x1, 0x1, read_write_mprv // write 1 to mstatus.mprv and set mstatus.mpp to be 01=S
.8byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, read64_test // read test succeeds with translation even though we're in M mode since MPP=S and MPRV=1
# test 12.3.1.5.2 mstatus.mprv clearing
# mstatus.mprv is already 1 from the last test so going to S mode should clear it with the mret
.8byte 0x80000000, 0x1, goto_s_mode // This should zero out the mprv bit but now to read and write mstatus, we have to
.8byte 0x80000000, 0x1, goto_m_mode // go back to m mode to allow us to reread mstatus.
.8byte 0x0, 0x0, read_write_mprv // read what should be a zeroed out mprv value and then force it back to zero.
# test 12.3.1.5.3 sstatus.mxr read
# this bitfield already tested in 12.3.1.3.3
# terminate tests
.8byte 0x0, 0x0, terminate_test # brings us back into machine mode with a final ecall, writing 0x9 to the output.

View File

@ -469,30 +469,31 @@ trap_handler_end_\MODE\(): // place to jump to so we can skip the trap handler a
// Turn translation off
li x7, 0 // satp.MODE value for bare metal (0)
slli x7, x7, 60
li x28, 0x8000D // Base Pagetable physical page number, satp.PPN field. *** add option for different pagetable location
add x7, x7, x28
csrw satp, x7
sfence.vma x0, x0 // *** flushes global pte's as well
.endm
.macro GOTO_SV39
.macro GOTO_SV39 ASID BASE_PPN
// Turn on sv39 virtual memory
li x7, 8 // satp.MODE value for Sv39 (8)
slli x7, x7, 60
li x28, 0x8000D // Base Pagetable physical page number, satp.PPN field. *** add option for different pagetable location
li x29, \ASID
slli x29, x29, 44
or x7, x7, x29 // put ASID into the correct field of SATP
li x28, \BASE_PPN // Base Pagetable physical page number, satp.PPN field.
add x7, x7, x28
csrw satp, x7
sfence.vma x0, x0 // *** flushes global pte's as well
.endm
.macro GOTO_SV48
.macro GOTO_SV48 ASID BASE_PPN
// Turn on sv48 virtual memory
li x7, 9 // satp.MODE value for Sv39 (8)
slli x7, x7, 60
li x28, 0x8000D // Base Pagetable physical page number, satp.PPN field. *** add option for different pagetable location
li x29, \ASID
slli x29, x29, 44
or x7, x7, x29 // put ASID into the correct field of SATP
li x28, \BASE_PPN // Base Pagetable physical page number, satp.PPN field.
add x7, x7, x28
csrw satp, x7
sfence.vma x0, x0 // *** flushes global pte's as well
.endm
.macro WRITE_READ_CSR CSR VAL
@ -709,15 +710,31 @@ goto_baremetal:
j test_loop // go to next test case
goto_sv39:
GOTO_SV39
// Turn sv39 translation on
// Base PPN in x28, ASID in x29
li x7, 8 // satp.MODE value for sv39 (8)
slli x7, x7, 60
slli x29, x29, 44
or x7, x7, x29 // put ASID into the correct field of SATP
or x7, x7, x28 // Base Pagetable physical page number, satp.PPN field.
csrw satp, x7
li x29, 0xFFFFFFFFFFFFF888
sfence.vma x0, x29 // just an attempt ***
j test_loop // go to next test case
goto_sv48:
GOTO_SV48
// Turn sv48 translation on
// Base PPN in x28, ASID in x29
li x7, 9 // satp.MODE value for sv48 (9)
slli x7, x7, 60
slli x29, x29, 44
or x7, x7, x29 // put ASID into the correct field of SATP
or x7, x7, x28 // Base Pagetable physical page number, satp.PPN field.
csrw satp, x7
j test_loop // go to next test case
write_mxr_sum:
// writes sstatus.[mxr, sum] with the (assumed to be) 2 bit value in x29. also assumes we're in S. M mode
// writes sstatus.[mxr, sum] with the (assumed to be) 2 bit value in x29. also assumes we're in S or M mode
li x30, 0xC0000 // mask bits for MXR, SUM
not x7, x29
slli x7, x7, 18
@ -727,6 +744,29 @@ write_mxr_sum:
csrs sstatus, x29
j test_loop
read_write_mprv:
// reads old mstatus.mprv value to output, then
// Writes mstatus.mprv with the 1 bit value in x29. assumes we're in m mode
li x30, 0x20000 // mask bits for mprv
csrr x7, mstatus
and x7, x7, x30
srli x7, x7, 17
sd x7, 0(x6) // store old mprv to output
addi x6, x6, 8
addi x16, x16, 8
not x7, x29
slli x7, x7, 17
slli x29, x29, 17
csrc mstatus, x7
csrs mstatus, x29 // clear or set mprv bit
li x7, 0x1800
csrc mstatus, x7
li x7, 0x800
csrs mstatus, x7 // set mpp to supervisor mode to see if mprv=1 really executes in the mpp mode
j test_loop
write_pmpcfg_0:
// writes the value in x29 to the pmpcfg register specified in x28.
// then writes the final value of pmpcfgX to the output.