Ross Thompson
4d53b9002f
Broken.
...
Possible change to walker, dcache, tlb addressing.
Improves the naming of address signals.
But has a problem when the walker finishes the dcache does not get the correct
address on the cycle the DTLB is updated. This leads to incorrect index
selection in the dcache.
2021-07-19 10:33:27 -05:00
David Harris
ed64d37e65
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-07-18 17:36:29 -04:00
David Harris
4f8f52f283
Added FLEN, NE, NF to config and started using these in FMA1
2021-07-18 17:28:25 -04:00
Katherine Parry
60dabb9094
fdivsqrt inegrated, but not completley working
2021-07-18 14:03:37 -04:00
David Harris
8317be5aed
Renamed pagetablewalker to hptw
2021-07-18 04:11:33 -04:00
David Harris
c75d70126f
LSUArb: Removed Demuxes on ReadDataW, DataMiisalignedM, HPTWStall
2021-07-18 03:51:30 -04:00
David Harris
3f7a3b280e
HPTW: Simpliifieid PRegEn
2021-07-18 03:35:38 -04:00
David Harris
60bd27a40e
Removed EndWalk signal and simplified TLBMissReg
2021-07-18 03:26:43 -04:00
Ross Thompson
14220684b6
Fixed bug with rv32a/WALLY-LRSC test in imperas. Minor issue.
2021-07-17 21:02:24 -05:00
Ross Thompson
009c5314b4
Fixed LRSC in 64bit version. 32bit version is broken.
2021-07-17 20:58:49 -05:00
David Harris
8bdf1eaf0f
added lrsc.sv
2021-07-17 21:15:08 -04:00
David Harris
8d348dacce
Started atomics
2021-07-17 21:11:41 -04:00
David Harris
574f7d9c32
moved subwordread to lsu
2021-07-17 20:37:20 -04:00
David Harris
e82374d19f
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-07-17 20:01:23 -04:00
David Harris
9a86fc899b
LSU cleanup
2021-07-17 20:01:03 -04:00
David Harris
d9750c16a5
Pushing HPTWPAdrM flop into LSUArb
2021-07-17 19:39:18 -04:00
David Harris
586341a41a
Simplified VPN case statement
2021-07-17 19:34:01 -04:00
Ross Thompson
9cfbc4aec0
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2021-07-17 18:27:44 -05:00
David Harris
35b7577be2
Finished HPTW TranslationPAdr simlification
2021-07-17 19:27:24 -04:00
Ross Thompson
1aac97030a
Before returning to the ready state the dcache must set SelAdr = 0 on the cycle before.
2021-07-17 18:26:29 -05:00
David Harris
2b1fdfbae2
Further TranslationVAdr simplification
2021-07-17 19:24:37 -04:00
David Harris
b785a20f90
Continued Translation Address Cleanup of TranslationPAdrMux
2021-07-17 19:16:56 -04:00
David Harris
fc88b3a693
Continued Translation Address Cleanup
2021-07-17 19:09:13 -04:00
David Harris
6536ef8dce
Refining address interface between HPTW and LSU
2021-07-17 19:02:18 -04:00
David Harris
7b92e7e590
Fixed bad register in I-FSD-01 Imperas test.
2021-07-17 17:08:07 -04:00
David Harris
a67292b5f3
trap.sv comment cleanup
2021-07-17 16:01:07 -04:00
David Harris
c1c3249709
trap.sv cleanup
2021-07-17 15:57:10 -04:00
David Harris
af5e1f7f39
Finished removing PageTableEntry redundant signals from hptw
2021-07-17 15:50:52 -04:00
David Harris
e182cac9bc
hptw: Removed NonBusTrapM from LSU
2021-07-17 15:24:26 -04:00
David Harris
2f81e4c70d
hptw: Removed NonBusTrapM from LSU
2021-07-17 15:22:24 -04:00
David Harris
428a9c1ca3
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-07-17 15:11:43 -04:00
David Harris
863e6e72d6
hptw: Propagating PageTableEntryF removal through IFU
2021-07-17 15:04:39 -04:00
David Harris
a855e0170e
hptw: Propagating PageTableEntryF removal through LSU
2021-07-17 15:01:01 -04:00
bbracker
8d65d50085
separated buildroot debugging from buildroot logging
2021-07-17 14:52:34 -04:00
David Harris
d4eeabe355
hptw: Unified PageTableEntryM and PageTableEntryF outputs of pagetablewalker into PTE
2021-07-17 14:48:44 -04:00
bbracker
82fc766819
swapped out linux testbench signal names
2021-07-17 14:48:12 -04:00
bbracker
18fb282a37
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-07-17 14:46:38 -04:00
bbracker
4a3503281f
swapped out linux testbench signal names
2021-07-17 14:46:18 -04:00
David Harris
86e04c080d
hptw: Added ValidLeaf and ValidNonLeaf for readability, renamed _WDV to _READ states
2021-07-17 14:36:27 -04:00
David Harris
714eef4a1a
hptw: Eliminated A and D bit faults while walking page table, per spec
2021-07-17 14:29:20 -04:00
David Harris
90c5312f85
hptw: Simplified TranslationVAdr calculation based just on DTLBWalk
2021-07-17 14:16:33 -04:00
David Harris
42aee1db30
hptw: renamed DTLBMissQ to DTLBWalk
2021-07-17 14:13:00 -04:00
David Harris
6f22e9a393
hptw: renamed ADRE to ADR
2021-07-17 14:02:59 -04:00
David Harris
3ce22a60b3
hptw: replaced PreviousWalkerState with a PageType FSM
2021-07-17 13:54:58 -04:00
David Harris
89fd653cc1
hptw: removed ITLBMissFQ
2021-07-17 13:44:08 -04:00
David Harris
87aa527de7
hptw: minor cleanup
2021-07-17 13:40:12 -04:00
David Harris
ea2aa469a1
hptw: Simplifed out AnyTLBMiss
2021-07-17 12:07:51 -04:00
David Harris
784e6cf538
hptw: Renamed Memstore to MemWrite
2021-07-17 12:01:43 -04:00
David Harris
0a6622a6fb
hptw: Merged RV32/64 FSMs
2021-07-17 11:55:24 -04:00
David Harris
cf0975c937
hptw: FSM simplification
2021-07-17 11:41:43 -04:00