Commit Graph

8 Commits

Author SHA1 Message Date
Jacob Pease
b63927b474 Connected the axi_sdc_controller with an axi crossbar.
Added an adrdec.sv to the adrdecs.sv file for the sake of the
cache. Modified Uncore accordingly.
2023-01-13 13:56:01 -06:00
Ross Thompson
b7224cc5ba Updated fpga constraints. 2022-12-21 14:50:01 -06:00
Ross Thompson
fd1ef82310 Fixed bug with fpga makefile. 2022-11-07 09:20:05 -06:00
Ross Thompson
1510c2d92f Setup to run with both the vcu108 and vcu118 boards. Set the parameters in the Makefile. 2022-10-24 15:38:39 -05:00
Ross Thompson
68745d40f2 Modified FPGA to add additional signals to ILA. Created advanced trigger for ILA using vivado's tsm language. 2021-12-12 17:21:44 -06:00
Ross Thompson
cbb5e4440f Improved FPGA makefile and fixed timing constraints in clock converter. 2021-12-03 10:05:13 -06:00
Ross Thompson
d5f445e0fd Added make clean to fpga IP generator. 2021-11-29 18:42:28 -06:00
Ross Thompson
a528a86607 Created Makefile to manage IP generation. 2021-11-29 18:33:58 -06:00