Xavi/cvw
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2,652 Commits 14 Branches 1 Tag 31 MiB
359a23237d
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Author SHA1 Message Date
Ross Thompson
359a23237d Progress towards simplifying the cache's write enables. 2022-02-07 17:23:09 -06:00
Ross Thompson
188fe28691 more cleanup. 2022-02-07 13:29:19 -06:00
Ross Thompson
9510a33c15 More cachefsm cleanup. 2022-02-07 13:19:37 -06:00
Ross Thompson
708e0cf183 More cachefsm cleanup. 2022-02-07 12:30:27 -06:00
Ross Thompson
5539a5fa6f More cachefsm cleanup. 2022-02-07 11:16:20 -06:00
Ross Thompson
6668956351 More cachefsm cleanup. 2022-02-07 11:12:28 -06:00
Ross Thompson
5536e3ca90 More cachefsm cleanup. 2022-02-07 10:54:22 -06:00
Ross Thompson
529d8b629a Cache cleanup. 2022-02-07 10:43:58 -06:00
Ross Thompson
41a79556e0 More cachfsm cleanup. 2022-02-07 10:33:50 -06:00
Ross Thompson
0b66106925 More cachefsm cleanup. 2022-02-06 21:50:44 -06:00
Ross Thompson
dd6baa9ed4 started cachefsm cleanup. 2022-02-06 21:39:38 -06:00
Ross Thompson
d21be9d998 Added config to allow using the save/restore or replay implementation to handle sram clocked read delay. 2022-02-04 23:49:07 -06:00
Ross Thompson
ea84211ff9 Removed unused ports from caches and buses. 2022-02-04 22:52:51 -06:00
Ross Thompson
011ad09341 Cleanup. 2022-02-04 22:40:51 -06:00
Ross Thompson
4074f695e0 Moved the hwdata mux back into the busdp. 2022-02-04 22:39:13 -06:00
Ross Thompson
40eb055861 Merged together the two sub cache line read muxes. 
One mux was used for loads and the other for eviction.
 2022-02-04 22:30:04 -06:00
Ross Thompson
290430cda8 Moved the sub cache line read logic to lsu/ifu. 2022-02-04 20:42:53 -06:00
Ross Thompson
725852362e Got separate module for the sub cache line read. 2022-02-04 20:23:09 -06:00
Ross Thompson
cdd599e340 Second optimization of save/restore. 2022-02-04 14:35:12 -06:00
Ross Thompson
459054900f Optimization of cache save/restore. 2022-02-04 14:21:04 -06:00
Ross Thompson
7c1f7e335c Working first cut of the cache changes moving the replay to a save/restore. 
The current implementation is too expensive costing (tag+linelen)*numway flip flops and muxes.
 2022-02-04 13:31:32 -06:00
David Harris
ee3300bcd2 sram1rw cleanup 2022-02-03 18:03:22 +00:00
David Harris
97d31cec21 sram1rw cleanup 2022-02-03 17:50:23 +00:00
David Harris
f9dd79d3e3 cachereplacementpolicy cleanup 2022-02-03 17:19:14 +00:00
David Harris
034ff5462c cachereplacementpolicy cleanup 2022-02-03 17:18:48 +00:00
David Harris
65f3bf4e0a cacheway cleanup 2022-02-03 16:52:22 +00:00
David Harris
eef04eed84 cacheway cleanup 2022-02-03 16:33:01 +00:00
David Harris
4d09510af9 cacheway cleanup 2022-02-03 16:07:55 +00:00
David Harris
7f237220dd cacheway cleanup 2022-02-03 16:00:57 +00:00
David Harris
a6708ed887 cache cleanup 2022-02-03 15:36:11 +00:00
Ross Thompson
b642a19e12 Merge branch 'makefiles' into main 2022-02-03 08:33:50 -06:00
Ross Thompson
c34907c95b Completed makefile updates to accelerate the generation of memfiles. There are two makefiles in the 
regression directory.  Makefile calls the submakefiles for generating elf files.
The second makefile-memfiles generates the memfiles, addr, and label files.
 2022-02-03 08:32:48 -06:00
Ross Thompson
9336682749 Manged to get all the tests compiled and converted to memfiles using new makefiles. 2022-02-03 00:00:15 -06:00
Ross Thompson
06c5a825c4 Quick patch to regression-wally to "fix" rv32ic. 2022-02-02 19:24:24 -06:00
Ross Thompson
5c640b6582 broken makefiles. 2022-02-02 19:15:11 -06:00
Ross Thompson
943dff106e Broken makefiles. 2022-02-02 19:14:42 -06:00
David Harris
38bbe23d14 More config file cleanup; 32ic tests broken 2022-02-03 01:08:34 +00:00
David Harris
da8819d64b changed DMEM and IMEM configurations to support BUS/TIM/CACHE 2022-02-03 00:41:09 +00:00
David Harris
68a6b4af3d Removed Busybear and Buildroot Configuration 2022-02-02 20:32:22 +00:00
David Harris
02071700d6 Removed Busybear dependencies 2022-02-02 20:28:21 +00:00
Ross Thompson
98990a294c Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-02-02 11:41:54 -06:00
Ross Thompson
f4a553fd7d Fixed testbench so coremark stops. 2022-02-02 11:37:48 -06:00
David Harris
4ba37d5cc0 Config file & wally-riscv-arch-test cleanup 2022-02-02 16:35:52 +00:00
Ross Thompson
4abc4ea77f Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-02-02 10:16:02 -06:00
Ross Thompson
2d827bf8c0 Added helpful signals to wavefile. 
Makefile for tests now creates the function address to name mapping files.
The function name and test name are included in the wave file.
 2022-02-02 10:15:54 -06:00
Ross Thompson
4b4cee3ddd Added correct stop condition for coremark. 2022-02-02 09:53:51 -06:00
David Harris
f27961f54b examples cleanup 2022-02-02 12:57:13 +00:00
Ross Thompson
143bdaa288 Modified makefiles to generate function address to name mappings for modelsim. 2022-02-01 18:25:03 -06:00
Ross Thompson
f055441ecf Improved function_radix to not printout warnings when no valid function is found. 2022-02-01 18:03:09 -06:00
Ross Thompson
5407b72af9 Setup the main regression test to be able to handle coremark. 2022-02-01 17:00:11 -06:00