Commit Graph

26 Commits

Author SHA1 Message Date
David Harris
aa31b45d88 Fixed RV32 tests after PMP fix 2023-03-28 08:35:23 -07:00
David Harris
39d3bf8e8a Fixed PMP issue 132. Updated tests to initialize PMP before using. Needs to remake tests 2023-03-28 06:58:17 -07:00
Ross Thompson
730f3ac84e Fixed all tap/space issue in RTL. 2023-03-24 17:32:25 -05:00
David Harris
77fb1b57f4 Fix Issue 145 2023-03-22 04:33:14 -07:00
David Harris
02e7e7d011 Added comments about PMP checker fixes when test cases will be ready to initialize PMP before entering user mode 2023-03-19 05:46:34 -07:00
Ross Thompson
b8dca927f2 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-06 18:39:15 -06:00
Ross Thompson
6fc157e628 Renamed PCFSpill to PCSpillF. 2023-03-06 17:50:57 -06:00
David Harris
e78591093e Renamed I/D TLBMissOrDAFault to TLBMissOrUpdateDA for consistency with UpdateDA 2023-03-01 11:18:00 -08:00
David Harris
0d3d499940 hptw typo fix 2023-02-26 19:38:34 -08:00
David Harris
907fbfec38 Simplified Access fault logic in HPTW 2023-02-26 18:50:37 -08:00
David Harris
d3f5708ded StoreAmo faults are generated instead of load faults on AMO operations 2023-02-26 18:35:10 -08:00
David Harris
d2fd34efe6 Renamed DAPageFault to UpdateDA 2023-02-26 17:51:45 -08:00
David Harris
246deeda82 renamed UpperBitsUnequalPageFault to UpperBitsUnequal 2023-02-26 17:32:34 -08:00
David Harris
099267ffce moved tlb to subdirectory 2023-02-26 17:31:03 -08:00
David Harris
a9e884acc8 Moved TLB into subdirectory of MMU 2023-02-26 17:28:05 -08:00
David Harris
2ad62ea31f Removed unneeded TLBFlush from TLBMiss 2023-02-26 10:04:16 -08:00
David Harris
2203c05724 Access faults are geted by ~TLBMiss rather than ~(Translate & ~TLBHit) 2023-02-26 09:58:34 -08:00
David Harris
4579a9d0c2 Renamed HPTW_WRITES_SUPPORTED to SVADU_SUPPORTED 2023-02-26 09:38:32 -08:00
David Harris
e3e5100f8d Renamed DAPageFault to HPTWDAPageFault in hptw to avoid name conflict with DAPageFault from tlbcontrol 2023-02-26 07:12:43 -08:00
David Harris
27acb90217 Fixed SSTC being unusable in M-MODE without Status.TM. Disable STIMECMP registers when SSTC_SUPPORTED = 0 2023-02-26 06:30:43 -08:00
David Harris
60752fe51c Fixed special cases of address decoder and documented better 2023-02-24 07:52:46 -08:00
David Harris
5b8d1e4134 PMP checker size check to avoid spurious warnings 2023-02-19 16:08:23 -08:00
David Harris
ac21bed64d Moved conditional instantiation outside pmpchecker 2023-02-19 15:31:00 -08:00
Ross Thompson
54a128491e Fixed Bug 66.
If a load missed at the same time as a spilled instruction fetch with an ITLB miss in the second cache line, the HPTW did not wait for the load miss to finish.
2023-02-06 17:32:28 -06:00
Ross Thompson
a33c579e4b Removed unreachable if branch in hptw next state logic. 2023-02-06 16:42:07 -06:00
David Harris
99d179dd3e Removed pipelined level of hierarchy 2023-02-02 14:14:11 -08:00