6 Commits

Author	SHA1	Message	Date
David Harris	183a2dcfb5	Debugging bus interface.	2021-02-10 01:43:54 -05:00
David Harris	2357f5513b	Debugging instruction fetch	2021-02-09 11:02:17 -05:00
David Harris	63c7c18771	Fixed lw by delaying read value by one cycle	2021-02-07 23:28:21 -05:00
David Harris	3551cc859b	Data memory bus integration	2021-02-07 23:21:55 -05:00
David Harris	d56d7a75a6	Rename ifu/dmem/ebu signals to match uarch diagram	2021-02-02 15:09:24 -05:00
David Harris	396cea1ea7	Reorganized src hierarchically	2021-01-30 11:50:37 -05:00