forked from Github_Repos/cvw
Possible fix for interrupt during a floating point divide.
This commit is contained in:
parent
2c80c2b35f
commit
a7ae593a68
@ -69,7 +69,7 @@ module hazard(
|
||||
assign StallECause = (DivBusyE) & ~(TrapM); // *** can we move to decode stage (KP?)
|
||||
// WFI terminates if any enabled interrupt is pending, even if global interrupts are disabled. It could also terminate with TW trap
|
||||
// assign StallMCause = (wfiM & (~TrapM & ~IntPendingM)); // | FDivBusyE;
|
||||
assign StallMCause = (wfiM & (~TrapM & ~IntPendingM)) | FDivBusyE;
|
||||
assign StallMCause = ((wfiM | FDivBusyE) & (~TrapM & ~IntPendingM)); //*** Ross: should FDivBusyE trigger StallECause rather than StallMCause similar to DivBusyE?
|
||||
assign StallWCause = LSUStallM | IFUStallF;
|
||||
|
||||
assign #1 StallF = StallFCause | StallD;
|
||||
|
Loading…
Reference in New Issue
Block a user