fixed small errors to get regression to run with bit manip supported.

This commit is contained in:
Kip Macsai-Goren 2023-02-10 10:37:06 -08:00
parent f9d934e5ae
commit a7237baa87
3 changed files with 16 additions and 15 deletions

View File

@ -34,20 +34,17 @@ module clmul #(parameter WIDTH=32) (
output logic [WIDTH-1:0] ClmulResult); // ZBS result output logic [WIDTH-1:0] ClmulResult); // ZBS result
logic [WIDTH-1:0] pp [WIDTH-1:0]; //partial AND products logic [WIDTH-1:0] pp [WIDTH-1:0]; //partial AND products
// Note: only generates the bottom WIDTH bits of the carryless multiply.
// To get the high bits or the reversed bits, the inputs can be shifted and reversed
// as they are in zbc where this is instantiated
genvar i,j; genvar i;
for (i=1; i<WIDTH;i++) begin:outer //loop fills partial product array for (i=0; i<WIDTH; i++) begin
for (j=0;j<=i;j++) begin: inner assign pp[i] = ((A & {(WIDTH){B[i]}}) << i); // Fill partial product array
assign pp[i][j] = A[i]&B[j]; // ClmulResult ^= pp[i];
end
end end
for (i=1;i<WIDTH;i++) begin:xortree assign ClmulResult = pp.xor();
assign result[i] = ^pp[i:0][i];
end
assign ClmulResult[0] = A[0]&B[0];
endmodule endmodule

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@ -30,10 +30,14 @@ module popcnt #(parameter WIDTH = 32) (
); );
logic [$clog2(WIDTH):0] sum; logic [$clog2(WIDTH):0] sum;
genvar i;
for (i=0;i<WIDTH;i++) begin:loop always_comb begin
assign sum = sum + num[i]; sum = 0;
for (int i=0;i<WIDTH;i++) begin:loop
sum = sum + num[i];
end end
end
assign PopCnt = sum; assign PopCnt = sum;

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@ -51,7 +51,7 @@ module zbs #(parameter WIDTH=32) (
10'b010010?_101: ZBSResult = ExtResult; 10'b010010?_101: ZBSResult = ExtResult;
10'b011010?_001: ZBSResult = InvResult; 10'b011010?_001: ZBSResult = InvResult;
10'b001010?_001: ZBSResult = SetResult; 10'b001010?_001: ZBSResult = SetResult;
default: ZBSResult = 0; // *** should never be reached or selected default: ZBSResult = 0; // *** expand to include faults
endcase endcase
end end