diff --git a/src/ieu/bmu/clmul.sv b/src/ieu/bmu/clmul.sv
index 5557283f..a83d014a 100644
--- a/src/ieu/bmu/clmul.sv
+++ b/src/ieu/bmu/clmul.sv
@@ -34,20 +34,17 @@ module clmul #(parameter WIDTH=32) (
   output logic [WIDTH-1:0] ClmulResult);     // ZBS result
 
   logic [WIDTH-1:0] pp [WIDTH-1:0]; //partial AND products
+  // Note: only generates the bottom WIDTH bits of the carryless multiply.
+  //    To get the high bits or the reversed bits, the inputs can be shifted and reversed
+  //    as they are in zbc where this is instantiated
 
-  genvar i,j;
-  for (i=1; i<WIDTH;i++) begin:outer //loop fills partial product array
-    for (j=0;j<=i;j++) begin: inner
-      assign pp[i][j] = A[i]&B[j];
-    end
+  genvar i;
+  for (i=0; i<WIDTH; i++) begin
+    assign pp[i] = ((A & {(WIDTH){B[i]}}) << i); // Fill partial product array
+    // ClmulResult ^= pp[i];
   end
 
-  for (i=1;i<WIDTH;i++) begin:xortree
-    assign result[i] = ^pp[i:0][i];
-  end
-
-  assign ClmulResult[0] = A[0]&B[0];
-
+  assign ClmulResult = pp.xor();
 
 endmodule
 
diff --git a/src/ieu/bmu/popcnt.sv b/src/ieu/bmu/popcnt.sv
index a5135dd1..57f8c9e3 100644
--- a/src/ieu/bmu/popcnt.sv
+++ b/src/ieu/bmu/popcnt.sv
@@ -30,10 +30,14 @@ module popcnt #(parameter WIDTH = 32) (
 );
 
   logic [$clog2(WIDTH):0] sum; 
-  genvar i;
-  for (i=0;i<WIDTH;i++) begin:loop
-    assign sum = sum + num[i];
+  
+  always_comb begin
+    sum = 0;
+    for (int i=0;i<WIDTH;i++) begin:loop
+      sum = sum + num[i];
+    end
   end
+
   assign PopCnt = sum;
 
   
diff --git a/src/ieu/bmu/zbs.sv b/src/ieu/bmu/zbs.sv
index ae3b751a..740c684b 100644
--- a/src/ieu/bmu/zbs.sv
+++ b/src/ieu/bmu/zbs.sv
@@ -51,7 +51,7 @@ module zbs #(parameter WIDTH=32) (
       10'b010010?_101: ZBSResult = ExtResult;
       10'b011010?_001: ZBSResult = InvResult;
       10'b001010?_001: ZBSResult = SetResult;
-      default: ZBSResult = 0; // *** should never be reached or selected
+      default: ZBSResult = 0; // *** expand to include faults
     endcase
   end