forked from Github_Repos/cvw
Renamed SelBusBuffer to SelFetchBuffer.
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9806babe9e
6
pipelined/src/cache/cache.sv
vendored
6
pipelined/src/cache/cache.sv
vendored
@ -100,7 +100,7 @@ module cache #(parameter LINELEN, NUMLINES, NUMWAYS, LOGBWPL, WORDLEN, MUXINTE
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logic ResetOrFlushAdr, ResetOrFlushWay;
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logic [LINELEN-1:0] ReadDataLine, ReadDataLineCache;
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logic [$clog2(LINELEN/8) - $clog2(MUXINTERVAL/8) - 1:0] WordOffsetAddr;
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logic SelBusBuffer;
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logic SelFetchBuffer;
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logic ce;
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localparam LOGLLENBYTES = $clog2(WORDLEN/8);
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@ -147,7 +147,7 @@ module cache #(parameter LINELEN, NUMLINES, NUMWAYS, LOGBWPL, WORDLEN, MUXINTE
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.y(WordOffsetAddr));
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else assign WordOffsetAddr = PAdr[$clog2(LINELEN/8) - 1 : $clog2(MUXINTERVAL/8)];
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mux2 #(LINELEN) EarlyReturnMux(ReadDataLineCache, FetchBuffer, SelBusBuffer, ReadDataLine);
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mux2 #(LINELEN) EarlyReturnMux(ReadDataLineCache, FetchBuffer, SelFetchBuffer, ReadDataLine);
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subcachelineread #(LINELEN, WORDLEN, MUXINTERVAL) subcachelineread(
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.PAdr(WordOffsetAddr),
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@ -200,7 +200,7 @@ module cache #(parameter LINELEN, NUMLINES, NUMWAYS, LOGBWPL, WORDLEN, MUXINTE
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.ClearValid, .ClearDirty, .SetDirty,
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.SetValid, .SelEvict, .SelFlush,
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.FlushAdrCntEn, .FlushWayCntEn, .FlushAdrCntRst,
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.FlushWayCntRst, .FlushAdrFlag, .FlushWayFlag, .FlushCache, .SelBusBuffer,
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.FlushWayCntRst, .FlushAdrFlag, .FlushWayFlag, .FlushCache, .SelFetchBuffer,
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.InvalidateCache,
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.ce,
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.LRUWriteEn);
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4
pipelined/src/cache/cachefsm.sv
vendored
4
pipelined/src/cache/cachefsm.sv
vendored
@ -71,7 +71,7 @@ module cachefsm
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output logic FlushWayCntEn,
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output logic FlushAdrCntRst,
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output logic FlushWayCntRst,
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output logic SelBusBuffer,
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output logic SelFetchBuffer,
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output logic ce);
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logic resetDelay;
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@ -200,7 +200,7 @@ module cachefsm
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(CurrState == STATE_MISS_WRITE_CACHE_LINE) |
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resetDelay;
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assign SelBusBuffer = CurrState == STATE_MISS_WRITE_CACHE_LINE | CurrState == STATE_MISS_READ_DELAY;
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assign SelFetchBuffer = CurrState == STATE_MISS_WRITE_CACHE_LINE | CurrState == STATE_MISS_READ_DELAY;
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assign ce = (CurrState == STATE_READY & ~CPUBusy | CacheStall) | (CurrState != STATE_READY) | reset;
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endmodule // cachefsm
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