forked from Github_Repos/cvw
Reduced complexity of linebytemask.
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pipelined/src/cache/cache.sv
vendored
3
pipelined/src/cache/cache.sv
vendored
@ -163,7 +163,8 @@ module cache #(parameter LINELEN, NUMLINES, NUMWAYS, LOGBWPL, WORDLEN, MUXINTE
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end
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assign FetchBufferByteSel = SetValid & ~SetDirty ? '1 : ~DemuxedByteMask; // If load miss set all muxes to 1.
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assign LineByteMask = ~SetValid & ~SetDirty ? '0 : ~SetValid & SetDirty ? DemuxedByteMask : '1; // if store hit only enable the word and subword bytes, else write all bytes.
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logic [LINELEN/8-1:0] LineByteMask2;
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assign LineByteMask = SetValid ? '1 : SetDirty ? DemuxedByteMask : '0;
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for(index = 0; index < LINELEN/8; index++) begin
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mux2 #(8) WriteDataMux(.d0(CacheWriteData[(8*index)%WORDLEN+7:(8*index)%WORDLEN]),
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