From 6da7849d278deb6211a62983eacf32a36f255721 Mon Sep 17 00:00:00 2001 From: Ross Thompson Date: Wed, 14 Dec 2022 09:34:29 -0600 Subject: [PATCH] Reduced complexity of linebytemask. --- pipelined/src/cache/cache.sv | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/pipelined/src/cache/cache.sv b/pipelined/src/cache/cache.sv index 6c7aa899..6145749e 100644 --- a/pipelined/src/cache/cache.sv +++ b/pipelined/src/cache/cache.sv @@ -163,7 +163,8 @@ module cache #(parameter LINELEN, NUMLINES, NUMWAYS, LOGBWPL, WORDLEN, MUXINTE end assign FetchBufferByteSel = SetValid & ~SetDirty ? '1 : ~DemuxedByteMask; // If load miss set all muxes to 1. - assign LineByteMask = ~SetValid & ~SetDirty ? '0 : ~SetValid & SetDirty ? DemuxedByteMask : '1; // if store hit only enable the word and subword bytes, else write all bytes. + logic [LINELEN/8-1:0] LineByteMask2; + assign LineByteMask = SetValid ? '1 : SetDirty ? DemuxedByteMask : '0; for(index = 0; index < LINELEN/8; index++) begin mux2 #(8) WriteDataMux(.d0(CacheWriteData[(8*index)%WORDLEN+7:(8*index)%WORDLEN]),