forked from Github_Repos/cvw
63 lines
2.8 KiB
Systemverilog
63 lines
2.8 KiB
Systemverilog
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///////////////////////////////////////////
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//
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// Written: 6/23/2021 me@KatherineParry.com, David_Harris@hmc.edu
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// Modified:
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//
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// Purpose: Leading Zero Anticipator
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//
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// A component of the Wally configurable RISC-V project.
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//
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// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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//
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// MIT LICENSE
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// Permission is hereby granted, free of charge, to any person obtaining a copy of this
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// software and associated documentation files (the "Software"), to deal in the Software
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// without restriction, including without limitation the rights to use, copy, modify, merge,
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// publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons
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// to whom the Software is furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in all copies or
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// substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
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// INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
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// PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
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// OR OTHER DEALINGS IN THE SOFTWARE.
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////////////////////////////////////////////////////////////////////////////////////////////////
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`include "wally-config.vh"
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module fmalza( // [Schmookler & Nowka, Leading zero anticipation and detection, IEEE Sym. Computer Arithmetic, 2001]
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input logic [3*`NF+6:0] A, // addend
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input logic [2*`NF+3:0] P, // product
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output logic [$clog2(3*`NF+7)-1:0] SCnt // normalization shift count for the positive result
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);
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logic [3*`NF+6:0] T;
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logic [3*`NF+6:0] G;
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logic [3*`NF+6:0] Z;
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logic [3*`NF+6:0] f;
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assign T[3*`NF+6:2*`NF+4] = A[3*`NF+6:2*`NF+4];
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assign G[3*`NF+6:2*`NF+4] = 0;
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assign Z[3*`NF+6:2*`NF+4] = ~A[3*`NF+6:2*`NF+4];
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assign T[2*`NF+3:0] = A[2*`NF+3:0]^P;
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assign G[2*`NF+3:0] = A[2*`NF+3:0]&P;
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assign Z[2*`NF+3:0] = ~A[2*`NF+3:0]&~P;
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// Apply function to determine Leading pattern
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// - note: the paper linked above uses the numbering system where 0 is the most significant bit
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//f[n] = ~T[n]&T[n-1] note: n is the MSB
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//f[i] = (T[i+1]&(G[i]&~Z[i-1] | Z[i]&~G[i-1])) | (~T[i+1]&(Z[i]&~Z[i-1] | G[i]&~G[i-1]))
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assign f[3*`NF+6] = ~T[3*`NF+6]&T[3*`NF+5];
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assign f[3*`NF+5:0] = (T[3*`NF+6:1]&(G[3*`NF+5:0]&{~Z[3*`NF+4:0], 1'b0} | Z[3*`NF+5:0]&{~G[3*`NF+4:0], 1'b1})) | (~T[3*`NF+6:1]&(Z[3*`NF+5:0]&{~Z[3*`NF+4:0], 1'b0} | G[3*`NF+5:0]&{~G[3*`NF+4:0], 1'b1}));
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lzc #(3*`NF+7) lzc (.num(f), .ZeroCnt(SCnt));
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endmodule
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