forked from Github_Repos/cvw
76 lines
2.4 KiB
Systemverilog
76 lines
2.4 KiB
Systemverilog
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///////////////////////////////////////////
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// RASPredictor.sv
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//
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// Written: Ross Thomposn
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// Email: ross1728@gmail.com
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// Created: February 15, 2021
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// Modified:
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//
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// Purpose: 2 bit saturating counter predictor with parameterized table depth.
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//
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// A component of the Wally configurable RISC-V project.
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//
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// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
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// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
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// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
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// is furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
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// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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///////////////////////////////////////////
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`include "wally-config.vh"
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module RASPredictor
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#(parameter int StackSize = 16
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)
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(input logic clk,
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input logic reset,
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input logic pop,
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output logic [`XLEN-1:0] popPC,
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input logic push,
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input logic incr,
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input logic [`XLEN-1:0] pushPC
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);
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logic CounterEn;
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localparam Depth = $clog2(StackSize);
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logic [StackSize-1:0] PtrD, PtrQ, PtrP1, PtrM1;
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logic [StackSize-1:0] [`XLEN-1:0] memory;
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assign CounterEn = pop | push | incr;
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assign PtrD = pop ? PtrM1 : PtrP1;
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assign PtrM1 = PtrQ - 1'b1;
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assign PtrP1 = PtrQ + 1'b1;
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// may have to handle a push and an incr at the same time.
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// *** what happens if jal is executing and there is a return being flushed in Decode?
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flopenr #(StackSize) PTR(.clk(clk),
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.reset(reset),
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.en(CounterEn),
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.d(PtrD),
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.q(PtrQ));
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always_ff @ (posedge clk) begin
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if(push) begin
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memory[PtrP1] <= #1 pushPC;
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end
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end
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assign popPC = memory[PtrQ];
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endmodule
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