David Harris 75dc86ddc0 Merge pull request #313 from ross144/main ... Fix extraneous force in testbench which keep btb in reset.		2023-06-06 08:41:34 -07:00
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cache	More parameterization. Copied Lim. Still no slow down.	2023-05-24 14:49:22 -05:00
ebu	More parameterization. Based on Lim's work. EBU, IFU (except bpred), and IEU done.	2023-05-24 14:56:02 -05:00
fpu	Update some spacing to make it look better	2023-06-05 11:03:06 -05:00
generic	Merge pull request #233 from AlecVercruysse/coverage3	2023-04-14 22:15:11 -05:00
hazard	MDU and hazard unit now also parameterized. Based on Lim's work. Again I want to clarify this their work. Not mine. I'm just doing this because the merge had an issue.	2023-05-24 15:01:35 -05:00
ieu	More parameterization. Copied Lim. Still no slow down.	2023-05-24 14:49:22 -05:00
ifu	Updated source code to be compatible with verilator 5.011 for lint only.	2023-05-31 10:44:23 -05:00
lsu	Completed LSU parameterization based on Lim's changes.	2023-05-26 11:26:09 -05:00
mdu	MDU and hazard unit now also parameterized. Based on Lim's work. Again I want to clarify this their work. Not mine. I'm just doing this because the merge had an issue.	2023-05-24 15:01:35 -05:00
mmu	Updated source code to be compatible with verilator 5.011 for lint only.	2023-05-31 10:44:23 -05:00
privileged	Found the coremark performance issue. The testbench was continuously forcing the BTB to all zeros. Once fixed it resolved the performance problem.	2023-06-05 15:42:05 -05:00
uncore	Updated source code to be compatible with verilator 5.011 for lint only.	2023-05-31 10:44:23 -05:00
wally	Updated source code to be compatible with verilator 5.011 for lint only.	2023-05-31 10:44:23 -05:00