Rose Thompson 2f04e5e597 Merge branch 'main' of github.com:rosethompson/cvw		2024-11-25 15:53:27 -06:00
..
cache	More lint cleanup: remove unused params	2024-11-16 12:35:37 -08:00
ebu	Updated email address authorship for my files.	2024-10-15 10:27:53 -05:00
fpu	Clean up verilator lint off commands and remove unnecessay ones	2024-11-15 23:52:50 -08:00
generic	Clean up verilator lint off commands and remove unnecessay ones	2024-11-15 23:52:50 -08:00
hazard	More lint cleanup: remove unused params	2024-11-16 12:35:37 -08:00
ieu	Remove outdated code	2024-09-23 06:06:26 -07:00
ifu	More lint cleanup: remove unused params	2024-11-16 12:35:37 -08:00
lsu	More lint cleanup: remove unused params	2024-11-16 12:35:37 -08:00
mdu	Clean up verilator lint off commands and remove unnecessay ones	2024-11-15 23:52:50 -08:00
mmu	Revert "This is a better solution. It's closer to the original book HPTW FSM,"	2024-10-11 17:02:51 -05:00
privileged	More lint cleanup: remove unused params	2024-11-16 12:35:37 -08:00
rvvi	Updated email address authorship for my files.	2024-10-15 10:27:53 -05:00
uncore	Merge branch 'main' of github.com:rosethompson/cvw	2024-11-25 15:53:27 -06:00
wally	More lint cleanup: remove unused params	2024-11-16 12:35:37 -08:00
cvw.sv	Converted fpga's rvvi from a config option to a testbench/fpga top level parameter and is envoked by passing --rvvi to wsim.	2024-07-24 12:47:50 -05:00