Commit Graph

257 Commits

Author SHA1 Message Date
Ross Thompson
a81cc883e9 Signal name changes. 2023-02-27 00:39:19 -06:00
David Harris
0d3d499940 hptw typo fix 2023-02-26 19:38:34 -08:00
Ross Thompson
447f6b1443 Branch predictor cleanup. 2023-02-26 21:28:36 -06:00
David Harris
907fbfec38 Simplified Access fault logic in HPTW 2023-02-26 18:50:37 -08:00
David Harris
d3f5708ded StoreAmo faults are generated instead of load faults on AMO operations 2023-02-26 18:35:10 -08:00
Ross Thompson
3804626166 Create module for instruction class prediction and decoding. 2023-02-26 20:20:30 -06:00
Ross Thompson
86f611577f Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-02-26 19:58:24 -06:00
David Harris
d2fd34efe6 Renamed DAPageFault to UpdateDA 2023-02-26 17:51:45 -08:00
David Harris
246deeda82 renamed UpperBitsUnequalPageFault to UpperBitsUnequal 2023-02-26 17:32:34 -08:00
David Harris
099267ffce moved tlb to subdirectory 2023-02-26 17:31:03 -08:00
David Harris
a9e884acc8 Moved TLB into subdirectory of MMU 2023-02-26 17:28:05 -08:00
Ross Thompson
bb276da6eb Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-02-26 12:06:06 -06:00
David Harris
2ad62ea31f Removed unneeded TLBFlush from TLBMiss 2023-02-26 10:04:16 -08:00
David Harris
2203c05724 Access faults are geted by ~TLBMiss rather than ~(Translate & ~TLBHit) 2023-02-26 09:58:34 -08:00
David Harris
4579a9d0c2 Renamed HPTW_WRITES_SUPPORTED to SVADU_SUPPORTED 2023-02-26 09:38:32 -08:00
David Harris
e3e5100f8d Renamed DAPageFault to HPTWDAPageFault in hptw to avoid name conflict with DAPageFault from tlbcontrol 2023-02-26 07:12:43 -08:00
David Harris
d50658addf Fixed missing assign when SSTC is not supported 2023-02-26 07:12:13 -08:00
David Harris
27acb90217 Fixed SSTC being unusable in M-MODE without Status.TM. Disable STIMECMP registers when SSTC_SUPPORTED = 0 2023-02-26 06:30:43 -08:00
Ross Thompson
7500bb75c6 PHT was enabled using the wrong ~flush and ~stall. 2023-02-24 22:57:32 -06:00
Ross Thompson
63b9f9ca3d gshare cleanup. 2023-02-24 22:55:51 -06:00
Ross Thompson
ed7ab402ad More signal renames. 2023-02-24 19:56:55 -06:00
Ross Thompson
e549bec060 Renamed signals to match new figures. 2023-02-24 19:51:47 -06:00
Kevin Kim
c7050ada78 removed old shifter 2023-02-24 17:33:47 -08:00
Ross Thompson
6ff524d843 Renamed signals to match figure 10.18. 2023-02-24 19:22:14 -06:00
Kevin Kim
b3180d7307 removed now-redundant zero-extend mux in alu 2023-02-24 17:14:12 -08:00
Kevin Kim
0fe1d3b9f3 took sign extension out of shifter 2023-02-24 17:09:56 -08:00
Ross Thompson
ea71fd09f5 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-02-24 18:50:35 -06:00
Ross Thompson
4058a49985 Possible fix to btb performance issue. 2023-02-24 18:36:41 -06:00
Ross Thompson
5c52827f51 Cleanup. 2023-02-24 18:20:42 -06:00
Ross Thompson
d030d323fd Completed critical path gshare fix. 2023-02-24 18:02:00 -06:00
Ross Thompson
c2021927ce Prep to fix gshare critical path. 2023-02-24 17:54:48 -06:00
Ross Thompson
4ffaa75c2a Modified btb forwarding logic to reduce critical path. 2023-02-24 17:47:43 -06:00
Kevin Kim
a856c5de96 optimized mux to shifter, passes rv32/64i 2023-02-24 12:09:34 -08:00
Kip Macsai-Goren
1ad1c4735d Merge remote-tracking branch 'upstream/main' into bit-manip 2023-02-24 09:28:24 -08:00
David Harris
60752fe51c Fixed special cases of address decoder and documented better 2023-02-24 07:52:46 -08:00
Kevin Kim
f0cf7c2c6a small optimization to condzext select 2023-02-23 21:57:28 -08:00
Ross Thompson
6e8791a0a5 Major cleanup of bp. 2023-02-23 16:19:03 -06:00
Ross Thompson
d880720b7e Partial replacement of InstrClassX with {JalX, RetX, JumpX, and BranchX}. 2023-02-23 15:55:34 -06:00
Kip Macsai-Goren
003ad0618d Merge remote-tracking branch 'upstream/main' into main 2023-02-23 13:33:45 -08:00
Ross Thompson
500764f97b Branch predictor cleanup. 2023-02-23 15:15:14 -06:00
Ross Thompson
70f7f59332 Moved more branch predictor logic into the performance counter block. 2023-02-23 15:14:56 -06:00
Ross Thompson
195343c84f Added if generate around bp logic only used with performance counters. 2023-02-23 14:39:31 -06:00
Ross Thompson
ed91fc5ce3 Renamed PCPredX to BTAX. 2023-02-23 14:33:32 -06:00
Kip Macsai-Goren
f8f89e692e Fixed lint errors on zero and pop count. All of regression passes 2023-02-22 20:25:51 -08:00
Kip Macsai-Goren
82611ba889 Manual attempt to merge with upstream changes 2023-02-22 19:42:30 -08:00
Kip Macsai-Goren
21eaa0b989 Merge remote-tracking branch 'upstream/main' into main 2023-02-22 15:47:54 -08:00
Ross Thompson
1af7b8051e Fixed bug in basic gshare. 2023-02-22 12:54:46 -06:00
Ross Thompson
fd5b940839 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-02-22 09:11:57 -06:00
Ross Thompson
5ecbc830cf Oups. Turns out dc_shell does not like string parameters.
Switched gshare to use an integer parameter to select between gshare and global.
2023-02-22 09:11:46 -06:00
Kip Macsai-Goren
66833f15f2 Merge remote-tracking branch 'upstream/main' into main 2023-02-21 14:48:41 -08:00
Kevin Kim
bb252acfbe added individual zb tests in tests.vh and testbench
- also minor alu/controller configurability changes
2023-02-21 11:52:05 -08:00
David Harris
bc4410e686 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-02-21 09:58:18 -08:00
David Harris
8df7768d32 Fixed Issue #65 fmv sign selection. Sign needs to come from most significant bit of raw X source without doing NaN Box fixes first. 2023-02-21 09:57:57 -08:00
David Harris
0b9fd8a4b3 Fixed Issue #106: fld rasies load access fault instead of illegal instruction. The IEU controller had considered all fp loads and stores to be legal regardless of whether the FPU is enabled or the type is supported. Merged illegal instruction detection from both units into the Decode stage, saving two bits of pipeline register as well. 2023-02-21 09:32:17 -08:00
Ross Thompson
fd5c12431e Fixed typo in the global branch predictor. 2023-02-20 18:48:02 -06:00
Ross Thompson
d2e06d9ef0 Cleanup branch predictor files. 2023-02-20 18:45:45 -06:00
Ross Thompson
a14c71bd95 Renamed branch predictors and consolidated global and gshare predictors. 2023-02-20 18:42:37 -06:00
Ross Thompson
68e39eeb66 Fixed another bug in the btb. 2023-02-20 17:54:22 -06:00
Ross Thompson
5187c78184 Fixed forwarding bug in the BTB. 2023-02-20 17:03:45 -06:00
Ross Thompson
d887124837 Found a bug where the d and i cache misses were not recorded in the performance counters. 2023-02-20 16:00:29 -06:00
Ross Thompson
1982c66b72 Simiplified BTB. 2023-02-20 15:39:42 -06:00
David Harris
bdcd867c11 Removed test code that broke LSU 2023-02-20 12:42:46 -08:00
David Harris
c6c21463d9 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-02-20 11:28:15 -08:00
David Harris
081a817925
Merge pull request #98 from ross144/main
New gshare implementation
2023-02-20 11:27:47 -08:00
David Harris
023ba68088 Extraction script updates to match new reports names 2023-02-20 10:16:45 -08:00
David Harris
df9950483e Removed unused and incomplete ROM macro instantations 2023-02-20 05:59:57 -08:00
David Harris
a59526fc8e Fixed IROM size parameters 2023-02-20 05:32:43 -08:00
David Harris
1d3b41e0fb New expression for BTB_SIZE to avoid error during sky90 synthesis 2023-02-20 04:02:00 -08:00
Ross Thompson
2d417c33a4 Simplified BTB by removing the valid bit. the instruction class provides the equivalent information. 2023-02-19 23:53:20 -06:00
Ross Thompson
0d79c0cebe Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-02-19 22:54:27 -06:00
Ross Thompson
b32093b33b Simplified branch predictor. 2023-02-19 22:49:48 -06:00
David Harris
0ac9c9e62a Added BTB_SIZE parameter independent of BPRED_SIIZE 2023-02-19 20:13:50 -08:00
David Harris
5b197f4f9d Parameterized btb to depend on BPRED_SIZE 2023-02-19 19:59:07 -08:00
Kip Macsai-Goren
8d0a600b96 Merge remote-tracking branch 'upstream/main' into main 2023-02-19 16:37:18 -08:00
David Harris
06872e3822 Adjusted DTIM to always be 512B independent of XLEN 2023-02-19 16:14:38 -08:00
David Harris
5b8d1e4134 PMP checker size check to avoid spurious warnings 2023-02-19 16:08:23 -08:00
David Harris
ac21bed64d Moved conditional instantiation outside pmpchecker 2023-02-19 15:31:00 -08:00
David Harris
7d031fcae0 Disabled W64M register for RV32 2023-02-19 07:03:31 -08:00
David Harris
6d405ad69b Fixed RAM instantiations 2023-02-19 06:31:41 -08:00
Ross Thompson
9ee48637dc Possibly much better branch predictor implemention.
The complexity is significantly reduced.
2023-02-19 00:17:37 -06:00
Kevin Kim
2069d92f9e B DONE (for now)
- datapath passes along comparator flag to alu
-  controllers and zbb handle min/max instructions
2023-02-18 22:12:55 -08:00
Ross Thompson
d44cb1febb Minor fix. 2023-02-18 23:55:46 -06:00
Kevin Kim
888f4318bc controlleres and zbb handle byte instructions 2023-02-18 21:06:55 -08:00
Kevin Kim
27581f8d28 alu and controllers handle andn, orn, xnor 2023-02-18 20:57:07 -08:00
Kevin Kim
ba968ed95e added logic to handle sign/zero extend instructions 2023-02-18 20:32:40 -08:00
Kevin Kim
5c563bef43 fixed ctlzw bug in count unit 2023-02-18 20:12:30 -08:00
Kevin Kim
6d60268240 zbb handles count instructions 2023-02-18 20:12:17 -08:00
Kevin Kim
9760f0ccfd fixed bmuctrl decode bug 2023-02-18 20:11:50 -08:00
Kevin Kim
84ddb6fb54 updated comments in bmuctrl 2023-02-18 19:57:10 -08:00
Kevin Kim
bec2905ee5 rotate instructions now handled in ZBB unit 2023-02-18 19:56:54 -08:00
Kevin Kim
e47cc222a6 removed redundant decode logic in bmuctrl 2023-02-18 19:50:36 -08:00
Kevin Kim
9203b0cc2f began ZBB integration into ieu 2023-02-18 19:44:14 -08:00
Kevin Kim
7780cbd47a bmuctrl handles roriw 2023-02-18 16:26:16 -08:00
Kip Macsai-Goren
883a6ca005 merge upstream synth changes 2023-02-18 14:35:19 -08:00
David Harris
0eda753dc4 Removed unused PredInstrClassE register from bpred 2023-02-18 05:59:25 -08:00
David Harris
0f4226a950 Removed unused weq0M register fron fdivsqrtpostproc 2023-02-18 05:57:39 -08:00
David Harris
66e5c60fb4 Fixed issue #57 of sign selection for improperly NaN-boxed number 2023-02-18 05:34:40 -08:00
David Harris
5986931fdc Fixed unpacking of illegal NaN box. Fixed issue #56 of sign injection NaN 2023-02-18 05:25:38 -08:00
Kevin Kim
92c0d3a4ed configured shifter in alu 2023-02-17 21:58:49 -08:00
Kevin Kim
182b27dfc8 shifter bug fix
- roli not passing unless I keep the MSB (instead of inverting) of truncated offset
2023-02-17 21:58:26 -08:00