David Harris
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5c8c50adba
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-03-01 11:18:05 -08:00 |
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David Harris
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23775c6d67
|
Renamed I/D TLBMissOrDAFault to TLBMissOrUpdateDA for consistency with UpdateDA
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2023-03-01 11:18:00 -08:00 |
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Ross Thompson
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90b2f0a652
|
Set bp to use instruction class prediction by default.
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2023-03-01 11:52:42 -06:00 |
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Ross Thompson
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dea6b643a6
|
Branch predictor cleanup.
I think Ch 10 is now done except for BTB performance analysis and the section on running benchmarks and collecting data.
|
2023-03-01 11:24:24 -06:00 |
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Ross Thompson
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03a6679ba0
|
More btb cleanup.
|
2023-03-01 10:47:00 -06:00 |
|
Ross Thompson
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554e7d0973
|
Minor fix to btb.
|
2023-03-01 10:45:40 -06:00 |
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Ross Thompson
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a6917d07f3
|
Name cleanup.
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2023-02-28 17:48:58 -06:00 |
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Kip Macsai-Goren
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58ab6ec805
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Merge remote-tracking branch 'upstream/main' into bit-manip
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2023-02-28 14:41:51 -08:00 |
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Kip Macsai-Goren
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f63748f097
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Merge remote-tracking branch 'origin' into bit-manip
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2023-02-28 14:39:57 -08:00 |
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Ross Thompson
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4c0e7f297a
|
Found the performance bug with the branch predictor btb power saving update.
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2023-02-28 15:57:34 -06:00 |
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Ross Thompson
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2ebe600f54
|
Name changes to reflect diagrams.
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2023-02-28 15:37:25 -06:00 |
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Ross Thompson
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be4823f7dd
|
Undid the btb update as it reduces performance.
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2023-02-28 15:21:56 -06:00 |
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Kevin Kim
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df0d75034b
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bitmanip decoder spits out regwrite, w64, and aluop signals [NEEDS DEBUG]
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2023-02-28 12:09:35 -08:00 |
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Kevin Kim
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b61d881c1b
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added BRegWrite, BW64, BALUOp signals to bctrl and controller
-TODO: Main decode in bmuctrl must assert these 3 signals
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2023-02-28 11:54:10 -08:00 |
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Kevin Kim
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692e406976
|
changed shifter source select signal name
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2023-02-28 11:41:40 -08:00 |
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Kevin Kim
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1506d50c63
|
rename result back to ALUResult in ALU
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2023-02-28 07:27:34 -08:00 |
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Ross Thompson
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9dd3379744
|
This icpred and btb changes are causing a performance issue.
|
2023-02-27 20:00:50 -06:00 |
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Ross Thompson
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544abe2819
|
Modified the BTB to save power by not updating when the prediction is unchanged.
|
2023-02-27 17:37:29 -06:00 |
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Ross Thompson
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bc5aecf948
|
Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-02-27 09:48:03 -06:00 |
|
David Harris
|
cf8b5f0783
|
Added support for ZMMUL
|
2023-02-27 07:29:53 -08:00 |
|
Ross Thompson
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318189e5e6
|
Signal name changes.
|
2023-02-27 00:39:19 -06:00 |
|
David Harris
|
f40352e82b
|
hptw typo fix
|
2023-02-26 19:38:34 -08:00 |
|
Ross Thompson
|
c89812b2d4
|
Branch predictor cleanup.
|
2023-02-26 21:28:36 -06:00 |
|
David Harris
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e9ad6ae057
|
Simplified Access fault logic in HPTW
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2023-02-26 18:50:37 -08:00 |
|
David Harris
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2d7145901b
|
StoreAmo faults are generated instead of load faults on AMO operations
|
2023-02-26 18:35:10 -08:00 |
|
Ross Thompson
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e8c5e5b5ff
|
Create module for instruction class prediction and decoding.
|
2023-02-26 20:20:30 -06:00 |
|
Ross Thompson
|
3964ce3309
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into main
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2023-02-26 19:58:24 -06:00 |
|
David Harris
|
21b28fd1bb
|
Renamed DAPageFault to UpdateDA
|
2023-02-26 17:51:45 -08:00 |
|
David Harris
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4274071333
|
renamed UpperBitsUnequalPageFault to UpperBitsUnequal
|
2023-02-26 17:32:34 -08:00 |
|
David Harris
|
06bd4783af
|
moved tlb to subdirectory
|
2023-02-26 17:31:03 -08:00 |
|
David Harris
|
c774b44116
|
Moved TLB into subdirectory of MMU
|
2023-02-26 17:28:05 -08:00 |
|
Ross Thompson
|
72be4318b8
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into main
|
2023-02-26 12:06:06 -06:00 |
|
David Harris
|
dc447ed5ed
|
Removed unneeded TLBFlush from TLBMiss
|
2023-02-26 10:04:16 -08:00 |
|
David Harris
|
54b8e7c629
|
Access faults are geted by ~TLBMiss rather than ~(Translate & ~TLBHit)
|
2023-02-26 09:58:34 -08:00 |
|
David Harris
|
35653a18b7
|
Renamed HPTW_WRITES_SUPPORTED to SVADU_SUPPORTED
|
2023-02-26 09:38:32 -08:00 |
|
David Harris
|
f31764c3e1
|
Renamed DAPageFault to HPTWDAPageFault in hptw to avoid name conflict with DAPageFault from tlbcontrol
|
2023-02-26 07:12:43 -08:00 |
|
David Harris
|
fe161f6bde
|
Fixed missing assign when SSTC is not supported
|
2023-02-26 07:12:13 -08:00 |
|
David Harris
|
8895114152
|
Fixed SSTC being unusable in M-MODE without Status.TM. Disable STIMECMP registers when SSTC_SUPPORTED = 0
|
2023-02-26 06:30:43 -08:00 |
|
Ross Thompson
|
7f8034013d
|
PHT was enabled using the wrong ~flush and ~stall.
|
2023-02-24 22:57:32 -06:00 |
|
Ross Thompson
|
eb9dc7e67d
|
gshare cleanup.
|
2023-02-24 22:55:51 -06:00 |
|
Ross Thompson
|
9df05f0b3d
|
More signal renames.
|
2023-02-24 19:56:55 -06:00 |
|
Ross Thompson
|
8bd4a4c35b
|
Renamed signals to match new figures.
|
2023-02-24 19:51:47 -06:00 |
|
Kevin Kim
|
f5d3e0e8a0
|
removed old shifter
|
2023-02-24 17:33:47 -08:00 |
|
Ross Thompson
|
f95f326b3d
|
Renamed signals to match figure 10.18.
|
2023-02-24 19:22:14 -06:00 |
|
Kevin Kim
|
601c6fcdc4
|
removed now-redundant zero-extend mux in alu
|
2023-02-24 17:14:12 -08:00 |
|
Kevin Kim
|
1d4200e3a3
|
took sign extension out of shifter
|
2023-02-24 17:09:56 -08:00 |
|
Ross Thompson
|
40a164a8da
|
Merge branch 'main' of https://github.com/openhwgroup/cvw
|
2023-02-24 18:50:35 -06:00 |
|
Ross Thompson
|
4031b89f18
|
Possible fix to btb performance issue.
|
2023-02-24 18:36:41 -06:00 |
|
Ross Thompson
|
ea8cb7dd78
|
Cleanup.
|
2023-02-24 18:20:42 -06:00 |
|
Ross Thompson
|
a14dcaa241
|
Completed critical path gshare fix.
|
2023-02-24 18:02:00 -06:00 |
|
Ross Thompson
|
31d6531af2
|
Prep to fix gshare critical path.
|
2023-02-24 17:54:48 -06:00 |
|
Ross Thompson
|
5db56460b9
|
Modified btb forwarding logic to reduce critical path.
|
2023-02-24 17:47:43 -06:00 |
|
Kevin Kim
|
00a0170b30
|
optimized mux to shifter, passes rv32/64i
|
2023-02-24 12:09:34 -08:00 |
|
Kip Macsai-Goren
|
f77d8206ec
|
Merge remote-tracking branch 'upstream/main' into bit-manip
|
2023-02-24 09:28:24 -08:00 |
|
David Harris
|
adfc01fc5a
|
Fixed special cases of address decoder and documented better
|
2023-02-24 07:52:46 -08:00 |
|
Kevin Kim
|
8b6d699857
|
small optimization to condzext select
|
2023-02-23 21:57:28 -08:00 |
|
Ross Thompson
|
2920179435
|
Major cleanup of bp.
|
2023-02-23 16:19:03 -06:00 |
|
Ross Thompson
|
fa49de8391
|
Partial replacement of InstrClassX with {JalX, RetX, JumpX, and BranchX}.
|
2023-02-23 15:55:34 -06:00 |
|
Kip Macsai-Goren
|
cb3990c77d
|
Merge remote-tracking branch 'upstream/main' into main
|
2023-02-23 13:33:45 -08:00 |
|
Ross Thompson
|
8503982328
|
Branch predictor cleanup.
|
2023-02-23 15:15:14 -06:00 |
|
Ross Thompson
|
403b2b7be1
|
Moved more branch predictor logic into the performance counter block.
|
2023-02-23 15:14:56 -06:00 |
|
Ross Thompson
|
526f046fb0
|
Added if generate around bp logic only used with performance counters.
|
2023-02-23 14:39:31 -06:00 |
|
Ross Thompson
|
2d919fa9e3
|
Renamed PCPredX to BTAX.
|
2023-02-23 14:33:32 -06:00 |
|
Kip Macsai-Goren
|
67f83cda7f
|
Fixed lint errors on zero and pop count. All of regression passes
|
2023-02-22 20:25:51 -08:00 |
|
Kip Macsai-Goren
|
ba3bfdf68b
|
Manual attempt to merge with upstream changes
|
2023-02-22 19:42:30 -08:00 |
|
Kip Macsai-Goren
|
cc47bd8bea
|
Merge remote-tracking branch 'upstream/main' into main
|
2023-02-22 15:47:54 -08:00 |
|
Ross Thompson
|
c736d7c1f3
|
Fixed bug in basic gshare.
|
2023-02-22 12:54:46 -06:00 |
|
Ross Thompson
|
849856034b
|
Merge branch 'main' of https://github.com/openhwgroup/cvw
|
2023-02-22 09:11:57 -06:00 |
|
Ross Thompson
|
5dde3af22e
|
Oups. Turns out dc_shell does not like string parameters.
Switched gshare to use an integer parameter to select between gshare and global.
|
2023-02-22 09:11:46 -06:00 |
|
Kip Macsai-Goren
|
d668c563f4
|
Merge remote-tracking branch 'upstream/main' into main
|
2023-02-21 14:48:41 -08:00 |
|
Kevin Kim
|
35bd4f7219
|
added individual zb tests in tests.vh and testbench
- also minor alu/controller configurability changes
|
2023-02-21 11:52:05 -08:00 |
|
David Harris
|
f0566173e6
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
|
2023-02-21 09:58:18 -08:00 |
|
David Harris
|
b59df0fca7
|
Fixed Issue #65 fmv sign selection. Sign needs to come from most significant bit of raw X source without doing NaN Box fixes first.
|
2023-02-21 09:57:57 -08:00 |
|
David Harris
|
a445e53e8d
|
Fixed Issue #106: fld rasies load access fault instead of illegal instruction. The IEU controller had considered all fp loads and stores to be legal regardless of whether the FPU is enabled or the type is supported. Merged illegal instruction detection from both units into the Decode stage, saving two bits of pipeline register as well.
|
2023-02-21 09:32:17 -08:00 |
|
Ross Thompson
|
7f0d64d0a6
|
Fixed typo in the global branch predictor.
|
2023-02-20 18:48:02 -06:00 |
|
Ross Thompson
|
2c2c1b5221
|
Cleanup branch predictor files.
|
2023-02-20 18:45:45 -06:00 |
|
Ross Thompson
|
7df3a84060
|
Renamed branch predictors and consolidated global and gshare predictors.
|
2023-02-20 18:42:37 -06:00 |
|
Ross Thompson
|
6eefa5b1e3
|
Fixed another bug in the btb.
|
2023-02-20 17:54:22 -06:00 |
|
Ross Thompson
|
d2b7047744
|
Fixed forwarding bug in the BTB.
|
2023-02-20 17:03:45 -06:00 |
|
Ross Thompson
|
fdd007a903
|
Found a bug where the d and i cache misses were not recorded in the performance counters.
|
2023-02-20 16:00:29 -06:00 |
|
Ross Thompson
|
545af7697f
|
Simiplified BTB.
|
2023-02-20 15:39:42 -06:00 |
|
David Harris
|
1028fd1053
|
Removed test code that broke LSU
|
2023-02-20 12:42:46 -08:00 |
|
David Harris
|
da61d11de1
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
|
2023-02-20 11:28:15 -08:00 |
|
David Harris
|
36b2d530c4
|
Merge pull request #98 from ross144/main
New gshare implementation
|
2023-02-20 11:27:47 -08:00 |
|
David Harris
|
801f4a68b7
|
Extraction script updates to match new reports names
|
2023-02-20 10:16:45 -08:00 |
|
David Harris
|
4cc8448b16
|
Removed unused and incomplete ROM macro instantations
|
2023-02-20 05:59:57 -08:00 |
|
David Harris
|
626715befd
|
Fixed IROM size parameters
|
2023-02-20 05:32:43 -08:00 |
|
David Harris
|
472c7da399
|
New expression for BTB_SIZE to avoid error during sky90 synthesis
|
2023-02-20 04:02:00 -08:00 |
|
Ross Thompson
|
4db249ca5d
|
Simplified BTB by removing the valid bit. the instruction class provides the equivalent information.
|
2023-02-19 23:53:20 -06:00 |
|
Ross Thompson
|
407d9e7b4a
|
Merge branch 'main' of https://github.com/openhwgroup/cvw
|
2023-02-19 22:54:27 -06:00 |
|
Ross Thompson
|
0f98cfe5b4
|
Simplified branch predictor.
|
2023-02-19 22:49:48 -06:00 |
|
David Harris
|
d07c6386b2
|
Added BTB_SIZE parameter independent of BPRED_SIIZE
|
2023-02-19 20:13:50 -08:00 |
|
David Harris
|
20ced0653c
|
Parameterized btb to depend on BPRED_SIZE
|
2023-02-19 19:59:07 -08:00 |
|
Kip Macsai-Goren
|
65a5b86dd8
|
Merge remote-tracking branch 'upstream/main' into main
|
2023-02-19 16:37:18 -08:00 |
|
David Harris
|
5287c54278
|
Adjusted DTIM to always be 512B independent of XLEN
|
2023-02-19 16:14:38 -08:00 |
|
David Harris
|
00d54cfe6c
|
PMP checker size check to avoid spurious warnings
|
2023-02-19 16:08:23 -08:00 |
|
David Harris
|
fa0406b554
|
Moved conditional instantiation outside pmpchecker
|
2023-02-19 15:31:00 -08:00 |
|
David Harris
|
8db49c83c4
|
Disabled W64M register for RV32
|
2023-02-19 07:03:31 -08:00 |
|
David Harris
|
527566c38a
|
Fixed RAM instantiations
|
2023-02-19 06:31:41 -08:00 |
|
Ross Thompson
|
89aa57e25e
|
Possibly much better branch predictor implemention.
The complexity is significantly reduced.
|
2023-02-19 00:17:37 -06:00 |
|