277 Commits

Author	SHA1	Message	Date
Kevin Kim	e80c1248a2	bug fix	2023-03-05 15:20:48 -08:00
Kevin Kim	3dbdf3d579	extend unit structural mux	2023-03-05 15:09:02 -08:00
Kevin Kim	696cfb6949	zbb result select mux structural	2023-03-05 14:57:30 -08:00
Kevin Kim	2ae32f75b5	zbc input mux structural	2023-03-05 14:26:31 -08:00
Kevin Kim	77d8f10574	revA signals to cnt, zbb	2023-03-05 14:26:24 -08:00
Kevin Kim	7836bc1e37	ALU changes ... - added PreShiftAmt signal for shadd - condinvB now muxes from B instead of mask	2023-03-05 14:06:24 -08:00
Kevin Kim	0f2360f0d7	bug in bctrl ... - deleted the min/minu decoding for some reason.	2023-03-04 23:56:33 -08:00
Kevin Kim	6b25c64a1f	BSelect from OH encoding to Binary	2023-03-04 23:19:31 -08:00
Kevin Kim	a293c350ba	alu pre-shift ... -changed ALU pre shift logic to use a 2 bit shifter instead of mux	2023-03-04 23:07:06 -08:00
Kevin Kim	7512e55699	added python script ... -I've been using this python script to make quick changes to the bitmanip controller	2023-03-04 22:54:32 -08:00
Kevin Kim	294e024c9b	Merge branch 'bit-manip' of https://github.com/kipmacsaigoren/cvw into bit-manip	2023-03-04 22:44:09 -08:00
Kevin Kim	9494cf9340	removed rotate signal in datapath and instead packed into the new BALUControl Signal ... - BALUControl contains Rotate, Mask, PreShift signals to select from the respective generation muxes in the ALU	2023-03-04 22:44:03 -08:00
Kip Macsai-Goren	4cede344a1	Merge remote-tracking branch 'upstream/main' into bit-manip	2023-03-04 14:43:12 -08:00
Kevin Kim	f5dca0bf4f	zbc result mux is now structural	2023-03-04 09:22:21 -08:00
Kevin Kim	72de867e65	Rotate signal now gets generated in bmu ctrl	2023-03-03 22:57:49 -08:00
Kevin Kim	b315066b03	license comments	2023-03-03 21:52:34 -08:00
Kevin Kim	0403cfd41a	removed redundant signals in controller	2023-03-03 21:52:25 -08:00
Kevin Kim	8dd39fbcfb	b controller generates comparison signed flag and controller branch signed logic updated accordingly	2023-03-03 17:12:29 -08:00
Ross Thompson	da74ed0369	Merge pull request #126 from davidharrishmc/dev ... ImperasDV setup	2023-03-03 18:01:32 -06:00
Kevin Kim	5e01f86bc5	sltD signal debug. Passes regression	2023-03-03 12:44:33 -08:00
Kevin Kim	c836eea17c	sltD logic optimize	2023-03-03 12:35:40 -08:00
Kevin Kim	d6f8c1dd29	Merge branch 'bctrlmigrate' of https://github.com/kipmacsaigoren/cvw into bctrlmigrate	2023-03-03 09:54:08 -08:00
Kevin Kim	1c55d4a8d5	Merge branch 'openhwgroup:main' into bctrlmigrate	2023-03-03 09:53:59 -08:00
Kevin Kim	422b428cba	removed outdated b-signals in controller	2023-03-03 08:45:42 -08:00
Kevin Kim	9cad890c1a	comments to bctrl	2023-03-03 08:41:47 -08:00
Kevin Kim	19410b4196	migrated B-subarith logic into b controller	2023-03-03 08:40:29 -08:00
Kevin Kim	2c3271dd62	began subarith configurability optimization in controller	2023-03-03 08:27:11 -08:00
Ross Thompson	0cb5369351	Renamed BTB misprediction to BTA.	2023-03-03 00:18:34 -06:00
Ross Thompson	5b5677ccb8	Added divide cycle counter.	2023-03-02 23:59:52 -06:00
Ross Thompson	aabb454d1c	Added the i and d cache cycle counters.	2023-03-02 23:54:56 -06:00
Ross Thompson	cfca77172e	Added fence counter.	2023-03-02 23:29:20 -06:00
Ross Thompson	f32f8c109a	Added csr write counter, sfence vma counter, interrupt counter, and exception counter.	2023-03-02 23:21:29 -06:00
Ross Thompson	a313b10912	Added store stall to performance counters.	2023-03-02 23:10:54 -06:00
Ross Thompson	2dd693a3b3	Reordered performance counters and added space for new ones.	2023-03-02 23:04:31 -06:00
David Harris	316b8b2250	Refactored Floating point division special case detection to avoid spurious trigger on Y for sqrt)	2023-03-02 20:00:47 -08:00
Kevin Kim	b21ca2fba0	bug fix, more elegant logic changes in controller	2023-03-02 16:00:56 -08:00
Kevin Kim	c9bd37c92b	formatting	2023-03-02 15:28:43 -08:00
Kevin Kim	910eeea3ff	removed main instruction decoder dependence on bmu controller	2023-03-02 15:28:33 -08:00
Kevin Kim	05b329dd6a	added bitmanip illegal instruction signal	2023-03-02 15:09:55 -08:00
Kevin Kim	3e8e633a56	zbc comments	2023-03-02 13:52:00 -08:00
Kevin Kim	b0307f5082	formatted bmu decoder	2023-03-02 13:45:15 -08:00
Kevin Kim	24b0b83d52	moved ALUControlD into configurable block	2023-03-02 12:17:03 -08:00
Kevin Kim	0f60505179	moved SubArith and RegWriteE into configurable block	2023-03-02 12:15:57 -08:00
Kevin Kim	b81a5e4452	added BRegWriteE signal	2023-03-02 12:15:22 -08:00
Kevin Kim	5e10720bed	rename shifternew to shifter	2023-03-02 11:45:32 -08:00
Kevin Kim	cf324510f3	zbc input select mux optimize	2023-03-02 11:43:05 -08:00
Kevin Kim	657719220a	zbc select mux optimization	2023-03-02 11:40:29 -08:00
Kevin Kim	e62a752522	fixed controller lint, changed byte unit mux select name and input width	2023-03-02 11:36:12 -08:00
Kevin Kim	a5e2e24320	removed redundant zbs	2023-03-02 11:22:09 -08:00
Ross Thompson	b98e007a53	Cleaned up branch predictor performance counters.	2023-03-01 17:05:42 -06:00