Commit Graph

32 Commits

Author SHA1 Message Date
David Harris
1196e5c191 Moved generate statements for optional units into wallypipelinedhart 2021-12-19 16:53:41 -08:00
Ross Thompson
547093b705 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2021-12-12 17:21:51 -06:00
Ross Thompson
b88ec949cf Added proper credit to Richard Davis, the author of the original sd card reader. 2021-12-12 15:05:50 -06:00
Ross Thompson
3bdda9687a Fixed some issues with the SDC having a different counter. When this is copied into synthesis the file names where the same and it gave a conflict.
Remove preload from dtim.
2021-12-08 15:50:15 -06:00
Ross Thompson
3d829dbbd3 Fixed two issues.
First the xci files already include the xdc constraints for each IP block. There is no need to include the xdc files explicitly.
Second the bidir buffer for the sd card was connected backwards.
2021-12-07 12:15:50 -06:00
Ross Thompson
74ffb48c0a Mostly integrated FPGA flow into main branch. Not all tests passing yet. 2021-12-02 18:00:32 -06:00
Ross Thompson
e43aa6ead4 Merge branch 'main' into fpga 2021-11-29 10:06:53 -06:00
Ross Thompson
4af7a27d87 Have linux booting. Not sure about uart, but uart is now part of the ILA and I can see TX changing. 2021-11-12 17:37:07 -06:00
Ross Thompson
b8572d6a2a Changed several things.
Removed the need to use async flip flops in SDC.
Added arrs, a synchronizer for reset.
I think this works with the real FPGA hardware.
The last build did not include this arrs but it worked.
2021-11-12 11:13:50 -06:00
Ross Thompson
0817ef20f1 Linux now boots fpga. 2021-10-26 16:49:16 -05:00
Ross Thompson
c90d129498 Fixed boot loader program to start at correct address.
modified script which converts the ram.txt into preload text file for sdc simulation.
created script to convert ram.txt into binary to write to flash card.
added top level for solo sd card fpga.
2021-10-11 17:22:23 -05:00
Ross Thompson
cbf4e76d1c Fixed sdc byte and nibble orders. 2021-10-11 12:15:52 -05:00
Ross Thompson
3d9d4cc03f Partially working sd card reader. 2021-10-11 10:23:45 -05:00
Ross Thompson
c10261f0ad Added more debug flags. 2021-10-03 11:41:21 -05:00
Ross Thompson
ec4a07de64 Movied tristate to test bench level. 2021-09-30 11:27:42 -05:00
Ross Thompson
db18aac9af Partially sd card read on fpga. 2021-09-30 11:23:09 -05:00
Ross Thompson
99070127d8 Added debugging directives to system verilog. 2021-09-27 13:57:46 -05:00
Ross Thompson
f2c1ca4bd5 added support to due partial fpga simulation. 2021-09-26 15:00:00 -05:00
Ross Thompson
6dc25e07c2 Updated the fpga bios code to emulate the same behavior as qemu's bootloader and it also copies
the flash card to dram.
Fixed latch issue in the sd card reader.
2021-09-26 13:22:23 -05:00
Ross Thompson
3a15cc7872 We now have a rough sdc read routine. 2021-09-25 17:51:38 -05:00
Ross Thompson
dd9fe60b28 Write of the SDC address register is correct. The command register is not yet working.
The root problem is the command register needs to be reset at the end of the SDC transaction.
2021-09-24 18:48:11 -05:00
Ross Thompson
5663522a3f Now have software interacting with the initialization and settting the address register. 2021-09-24 18:30:26 -05:00
Ross Thompson
232d4a554f Have program which checks for sdc init and issues read, but read done is
not correctly being read back by the software.  The error is in how the
sdc indicates busy.
2021-09-24 15:53:38 -05:00
Ross Thompson
71e20c7f61 Fixed lint errors in the SDC. 2021-09-24 12:38:48 -05:00
Ross Thompson
af28cfb70c Added SDC defines to each config mode.
Added sd_top which is the sd card reader.
2021-09-24 12:24:30 -05:00
Ross Thompson
0a33f5fa46 setup so the sdc does not need to load a model in the imperas test bench. 2021-09-24 11:30:52 -05:00
Ross Thompson
78028947bf Updated Imperas test bench to work with the SDC reader. 2021-09-24 11:22:54 -05:00
Ross Thompson
4256ef82b1 SDC to ABHLite interface partially done.
Added SDC to adrdec and uncore.
2021-09-24 10:45:09 -05:00
Ross Thompson
a182263b1c Added clock gater and divider to generate the SDCCLK. 2021-09-23 17:58:50 -05:00
Ross Thompson
9ed7a1f494 Partial implementation of SDC AHBLite interface. 2021-09-23 17:45:45 -05:00
Ross Thompson
0f7be5e591 Started the AHBLite to SDC interface. 2021-09-22 18:08:38 -05:00
Ross Thompson
f5905f33d3 Initial SD Card reader. 2021-09-22 10:50:29 -05:00