Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity
4,914 Commits 5 Branches 2 Tags 53 MiB
d21eef40d7
Commit Graph

1968 Commits

Author SHA1 Message Date
Ross Thompson
37481fce77 More branch predictor cleanup. 
Found small bug. The decode stage was using the predicted instruction class rather than the decoded instruction class.
 2023-01-13 12:57:18 -06:00
Ross Thompson
b26cec1ef4 Possible optimization of gshare. 
I don't believe the Writeback stage ghr is needed.
 2023-01-13 12:39:29 -06:00
Ross Thompson
f7dacb59f9 Possible minor enhancement to gshare. 2023-01-13 12:32:39 -06:00
Ross Thompson
36e74b7f4e Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2023-01-13 10:26:07 -06:00
Ross Thompson
14ecaabbf6 Nearly complete RVVI tracer. 
Missing PMP registers and performance counters other than MCYCLE and MINSTRET.
 2023-01-12 18:43:39 -06:00
Ross Thompson
59b135d895 Added supervisor mode registers to tracer. 2023-01-12 17:04:41 -06:00
Ross Thompson
6500321aaf Added M CSRs to the CSRArray. 2023-01-12 16:51:51 -06:00
Ross Thompson
8981739310 added machine csr to logger. 2023-01-12 16:35:19 -06:00
Ross Thompson
f3443e2eca Added support to print the gprs. 2023-01-12 16:09:30 -06:00
Ross Thompson
0ea0e7a9e1 rvvi trace is coming alone nicely. 2023-01-12 14:46:31 -06:00
Ross Thompson
9a180f88f7 Completely stripped down imperas simulation. 
run with
vsim -c -do "do wally-pipelined-imperas.do rv64gc"
 2023-01-12 12:48:38 -06:00
Ross Thompson
5112ffcbc9 Stripped out all signature checking. 
Removed multiple tests loop.
Only runs 1 test now.
 2023-01-12 12:45:44 -06:00
Ross Thompson
8ee80c5d54 Created separate imperas testbench. 
Resolved logger issue with the duplicated instructions after commit.
 2023-01-12 12:07:07 -06:00
Ross Thompson
f59e1d03fc Added instruction logger. 2023-01-12 10:09:34 -06:00
David Harris
496d343660 Privileged unit formatting 2023-01-12 07:41:30 -08:00
David Harris
d586809903 restructured code for lint error related to CORRSHIFTSZ 2023-01-12 07:34:37 -08:00
David Harris
a3a736091c Restructured negateintres to avoid lint error, but one still shows on shiftcorrection 2023-01-12 07:28:52 -08:00
David Harris
b3e1badd31 MDU comment cleanup 2023-01-12 07:15:14 -08:00
David Harris
e67f125201 Header comments 2023-01-12 04:35:44 -08:00
Ross Thompson
b5250466ec Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2023-01-11 23:02:14 -06:00
Katherine Parry
4079f76a78 cleaned up all FPU files except for division 2023-01-11 22:02:30 -06:00
David Harris
49575dfb90 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2023-01-11 19:48:37 -08:00
David Harris
3aab0fae55 Removed unused wallypipelinedsocwrapper 2023-01-11 19:48:34 -08:00
Ross Thompson
3a41854f2b Completed review of LSU. 2023-01-11 19:06:03 -06:00
Ross Thompson
f15de26f5c Merge branch 'main' of github.com:davidharrishmc/riscv-wally 2023-01-11 18:52:49 -06:00
Ross Thompson
2f3bf9eaf5 Improved LSU formating. 2023-01-11 18:52:46 -06:00
sarah-harris
3b363f5f9d privilege unit -> privileged unit in ifu.sv 
privilege unit -> privileged unit in ifu.sv
 2023-01-11 16:33:08 -08:00
Ross Thompson
0362e88098 Merge branch 'main' of github.com:davidharrishmc/riscv-wally 2023-01-11 17:26:11 -06:00
sarah-harris
829ab2c9aa Added Sarah.Harris@unlv.edu to alu.sv 
Added Sarah.Harris@unlv.edu to alu.sv
 2023-01-11 15:20:41 -08:00
Ross Thompson
a42d436962 Merge branch 'main' of github.com:davidharrishmc/riscv-wally 2023-01-11 17:15:49 -06:00
David Harris
7d93659f6b changed name to CORE-V-WALLY 2023-01-11 15:15:08 -08:00
Ross Thompson
a024dbccd6 Updated header for LSU. 2023-01-11 17:15:07 -06:00
David Harris
8f4b33c900 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2023-01-11 15:13:58 -08:00
Ross Thompson
96c61bd2ca Merge branch 'main' of github.com:davidharrishmc/riscv-wally 2023-01-11 17:09:23 -06:00
Katherine Parry
6f75bda815 fixed typo bug in fpu 2023-01-11 17:07:02 -06:00
Ross Thompson
5f31c681ff Updated branch predictor. 2023-01-11 17:00:45 -06:00
David Harris
b911056e66 Changed Wally to CORE-V Wally 2023-01-11 14:03:44 -08:00
David Harris
5a565ebeb5 FPU cleanup 2023-01-11 12:27:00 -08:00
David Harris
68347d3558 fpu cleanup 2023-01-11 12:18:06 -08:00
David Harris
19f0eb2aa1 Rename FP and FPU to F in signal names 2023-01-11 11:46:36 -08:00
David Harris
41076d4639 FPU comments 2023-01-11 11:31:28 -08:00
David Harris
e6f110b953 Replaced MDUE with IntDivE in FDIVSQRT 2023-01-11 11:06:37 -08:00
Ross Thompson
aa5300389f Optimized gshare. 2023-01-10 18:12:48 -06:00
David Harris
3a29e74647 Switched to XZeroE from NumerZeroE in square root preprocessor 2023-01-10 12:37:49 -08:00
David Harris
e92cffbb5e Changed MIT license to Solderpad License 2023-01-10 11:35:20 -08:00
David Harris
ddb65ff85f Division constant cleanup 2023-01-10 11:14:59 -08:00
David Harris
080e8884db Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2023-01-09 13:04:37 -08:00
David Harris
4f4b49886e Changed DIVN from NF+3 to NF+2, cleanup 2023-01-09 13:04:34 -08:00
Ross Thompson
0a77d80224 Added folded gshare predictor with k=16 and depth=10. 2023-01-09 14:41:03 -06:00
David Harris
87e07e9081 Divider constant cleanup, made CORRSHIFTSZ consistent 2023-01-09 12:34:19 -08:00
Ross Thompson
8e618dd1b3 Added better branch predictor to fpga config. 2023-01-09 13:46:30 -06:00
Ross Thompson
685db5bb90 Fixed branch predictor. 2023-01-09 13:45:49 -06:00
Ross Thompson
e3df1d3326 Restored to default configuration. 2023-01-09 00:21:45 -06:00
Ross Thompson
61c24c523d Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2023-01-09 00:18:11 -06:00
Ross Thompson
f032eae7f5 Might have actually solved the gshare bug. 2023-01-09 00:11:25 -06:00
Ross Thompson
97feea2f48 Possibly working speculative global history. 2023-01-08 23:46:53 -06:00
Ross Thompson
a35fb3addd core part of global history works now. forwarding is still broken. 2023-01-08 23:35:02 -06:00
David Harris
a757dcb5bd Cache code cleanup 2023-01-07 15:49:18 -08:00
David Harris
989b209a60 Cache code cleanup 2023-01-07 15:46:23 -08:00
David Harris
9f7bef7921 Cache code cleanup 2023-01-07 15:44:44 -08:00
David Harris
ec0e9b117b Cache code cleanup 2023-01-07 15:42:08 -08:00
David Harris
7f7605737f Cache code cleanup 2023-01-07 15:39:13 -08:00
Ross Thompson
f643b45b97 Added branch outcome logger to testbench 2023-01-07 13:16:57 -06:00
Ross Thompson
39731f99f4 Removed unused rv64BP config. 2023-01-07 12:17:40 -06:00
David Harris
5fbba604f1 Remove unused CACHE_ENABLED parameter 2023-01-07 09:57:24 -08:00
David Harris
9e67b9475e Remove unused signals 2023-01-07 06:26:29 -08:00
David Harris
15b829bbf7 Removed unused signals 2023-01-07 06:06:54 -08:00
David Harris
9bdf79bfe6 Removed unused signals; added check for atomic in pmachecker 2023-01-07 05:59:56 -08:00
David Harris
d1839b6db2 Remove conditional from inside decompress module 2023-01-07 05:51:47 -08:00
David Harris
0a011f4548 Remove unused signals 2023-01-07 05:46:22 -08:00
David Harris
6d22c73676 Branch logic simplification and remove unused signals 2023-01-07 05:42:34 -08:00
David Harris
cdcee61aac vclean working; started removing unused signals 2023-01-07 05:34:58 -08:00
David Harris
cf103f2588 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2023-01-07 04:49:40 -08:00
David Harris
6763f51b3c code cleanup 2023-01-07 04:49:25 -08:00
Ross Thompson
48cf8d58b4 Merge branch 'main' of github.com:davidharrishmc/riscv-wally 2023-01-06 15:18:13 -06:00
Ross Thompson
81fe08192e Added python script to post process performance counter metrics. 2023-01-06 15:15:54 -06:00
Katherine Parry
1afe815538 renamed alot of signals in fpu 2023-01-06 10:35:23 -06:00
David Harris
31bffc305b Removed unused UARCH configuration entries 2023-01-06 05:11:14 -08:00
Ross Thompson
34f8f2c47a Added more missing files. 2023-01-06 00:12:08 -06:00
Ross Thompson
0081ff92f9 Addd missing file. 2023-01-06 00:09:18 -06:00
Ross Thompson
cd17d296d2 Added code to print out performance counters at end of each test. 2023-01-05 18:00:11 -06:00
Ross Thompson
e34f80db2f More branch predictor cleanup. 2023-01-05 17:19:27 -06:00
Ross Thompson
010168a69e Keep around the old gshare. 2023-01-05 15:55:46 -06:00
Ross Thompson
f3d871f2c3 Added speculative gshare. 2023-01-05 14:18:00 -06:00
Ross Thompson
3637067ace Officially added global history with speculation to types of branch predictors. 2023-01-05 14:04:09 -06:00
Ross Thompson
8ca6c1255e More branch predictor cleanup. 2023-01-05 13:36:51 -06:00
Ross Thompson
bca87d326b Two bit predictor cleanup. 2023-01-05 13:27:22 -06:00
Ross Thompson
87c9682311 Simplified gshare. 2023-01-04 23:51:09 -06:00
Ross Thompson
f8c656f1e0 Simiplified global history branch predictor. 2023-01-04 23:41:55 -06:00
davidharrishmc
f1c950a5a7 Update decompress.sv 
typo
 2023-01-04 17:01:26 -08:00
Katherine Parry
b6e900185e forgot the normshift module 2023-01-04 10:48:19 -06:00
Katherine Parry
fd3b967496 some commenting fixes, converter optimizations, and moves normshift into postproc 2023-01-03 15:55:30 -06:00
David Harris
9430aebaab Made Q4.k interface to fgen2/4 consistent 2023-01-01 15:06:32 -08:00
David Harris
86a49ec91f Simplified intdiv selection logic to muxes 2023-01-01 14:04:37 -08:00
David Harris
499b52a7f0 Handle special case Int Div/Rem of |A| < |B| in a single cycle 2023-01-01 13:54:01 -08:00
David Harris
c653f1b30f Fixed radix 2 k = 1 lint 2022-12-31 07:01:50 -08:00
David Harris
a69a3e6eee Fixed backward mux in fdivsqrtstage2 2022-12-31 06:55:20 -08:00
David Harris
dc27284b7f Broken commit starting to address radix 2 issues 2022-12-31 06:19:15 -08:00
David Harris
1e150160eb Moved shared config so wally-shared only has values a user would alter 2022-12-31 05:51:42 -08:00
David Harris
f53d1f6e9b fdivsqrt post processing cleanup 2022-12-31 05:45:15 -08:00