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fixed typo bug in fpu

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Katherine Parry 2023-01-11 17:07:02 -06:00
parent 5a565ebeb5
commit 6f75bda815
1 changed files with 1 additions and 1 deletions
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pipelined/src/fpu/postproc/negateintres.sv
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@ -42,5 +42,5 @@ module negateintres(
// select 2 most significant bits
mux2 #(3) msb3mux(CvtNegRes[33:31], CvtNegRes[`XLEN+1:`XLEN-1], Int64, CvtNegResMsbs3);
mux2 #(2) msb2mux(CvtNegResMsbs3[2:1], CvtNegRes[1:0], Signed, CvtNegResMsbs);
mux2 #(2) msb2mux(CvtNegResMsbs3[2:1], CvtNegResMsbs3[1:0], Signed, CvtNegResMsbs);
endmodule